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Commit c6fadabb authored by Alistair Popple's avatar Alistair Popple Committed by Michael Ellerman
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powerpc: Fix definition of PCR bits to work with old binutils



Commit 388cc6e1 ("KVM: PPC: Book3S HV: Support POWER6
compatibility mode on POWER7") introduced new macros defining the PCR
bits. When used from assembly files these definitions lead to build
errors using older versions of binutils that don't support the 'ul'
suffix. This fixes the build errors by updating the definitions to use
the __MASK() macro which selects the appropriate suffix.

Signed-off-by: default avatarAlistair Popple <alistair@popple.id.au>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20190917004605.22471-1-alistair@popple.id.au
parent 7aec584e
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+3 −3
Original line number Original line Diff line number Diff line
@@ -475,9 +475,9 @@
#define   HMER_DEBUG_TRIG	(1ul << (63 - 17)) /* Debug trigger */
#define   HMER_DEBUG_TRIG	(1ul << (63 - 17)) /* Debug trigger */
#define	SPRN_HMEER	0x151	/* Hyp maintenance exception enable reg */
#define	SPRN_HMEER	0x151	/* Hyp maintenance exception enable reg */
#define SPRN_PCR	0x152	/* Processor compatibility register */
#define SPRN_PCR	0x152	/* Processor compatibility register */
#define   PCR_VEC_DIS	(1ul << (63-0))	/* Vec. disable (bit NA since POWER8) */
#define   PCR_VEC_DIS	(__MASK(63-0))	/* Vec. disable (bit NA since POWER8) */
#define   PCR_VSX_DIS	(1ul << (63-1))	/* VSX disable (bit NA since POWER8) */
#define   PCR_VSX_DIS	(__MASK(63-1))	/* VSX disable (bit NA since POWER8) */
#define   PCR_TM_DIS	(1ul << (63-2))	/* Trans. memory disable (POWER8) */
#define   PCR_TM_DIS	(__MASK(63-2))	/* Trans. memory disable (POWER8) */
/*
/*
 * These bits are used in the function kvmppc_set_arch_compat() to specify and
 * These bits are used in the function kvmppc_set_arch_compat() to specify and
 * determine both the compatibility level which we want to emulate and the
 * determine both the compatibility level which we want to emulate and the