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Commit c6185b1f authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Thomas Gleixner
Browse files

x86/mm/cpa: Use flush_tlb_all() 



Instead of open-coding it..

Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarDave Hansen <dave.hansen@intel.com>
Cc: Bin Yang <bin.yang@intel.com>
Cc: Mark Gross <mark.gross@intel.com>
Link: https://lkml.kernel.org/r/20180919085947.831102058@infradead.org
parent 585948f4

arch/x86/mm/pageattr.c

+1 −11
Original line number Diff line number Diff line
@@ -285,16 +285,6 @@ static void cpa_flush_all(unsigned long cache) 
	on_each_cpu(__cpa_flush_all, (void *) cache, 1);

}



static void __cpa_flush_range(void *arg)

{

	/*

	 * We could optimize that further and do individual per page

	 * tlb invalidates for a low number of pages. Caveat: we must

	 * flush the high aliases on 64bit as well.

	 */

	__flush_tlb_all();

}



static void cpa_flush_range(unsigned long start, int numpages, int cache)

{

	unsigned int i, level;
@@ -303,7 +293,7 @@ static void cpa_flush_range(unsigned long start, int numpages, int cache) 
	BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);

	WARN_ON(PAGE_ALIGN(start) != start);



	on_each_cpu(__cpa_flush_range, NULL, 1);

	flush_tlb_all();



	if (!cache)

		return;