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Commit c4be8c68 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard
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clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM 



The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent a91afc97

drivers/clk/sunxi-ng/ccu-sun8i-h3.h

+3 −1
Original line number Diff line number Diff line
@@ -29,7 +29,9 @@ 
#define CLK_PLL_VIDEO		6

#define CLK_PLL_VE		7

#define CLK_PLL_DDR		8

#define CLK_PLL_PERIPH0		9



/* PLL_PERIPH0 exported for PRCM */



#define CLK_PLL_PERIPH0_2X	10

#define CLK_PLL_GPU		11

#define CLK_PLL_PERIPH1		12

include/dt-bindings/clock/sun8i-h3-ccu.h

+2 −0
Original line number Diff line number Diff line
@@ -43,6 +43,8 @@ 
#ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_

#define _DT_BINDINGS_CLK_SUN8I_H3_H_



#define CLK_PLL_PERIPH0		9



#define CLK_CPUX		14



#define CLK_BUS_CE		20