Loading qcom/holi-coresight.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -1958,7 +1958,7 @@ clocks = <&rpmcc RPM_SMD_QDSS_CLK>; clock-names = "apb_pclk"; coresight-ctis = <&cti0 &cti6>; in-ports { port { tmc_etf_in_funnel_merge: endpoint { Loading Loading
qcom/holi-coresight.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -1958,7 +1958,7 @@ clocks = <&rpmcc RPM_SMD_QDSS_CLK>; clock-names = "apb_pclk"; coresight-ctis = <&cti0 &cti6>; in-ports { port { tmc_etf_in_funnel_merge: endpoint { Loading