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Commit c49e6b59 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: enable ULPS for CMD mode panels on Lahaina"

parents b46f983d 9621e732

display/lahaina-sde-display.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -153,6 +153,7 @@ 


/* PHY TIMINGS REVISION YB */

&dsi_sw43404_amoled_cmd {

	qcom,ulps-enabled;

	qcom,esd-check-enabled;

	qcom,mdss-dsi-panel-status-check-mode = "reg_read";

	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
@@ -203,6 +204,7 @@ 
};



&dsi_r66451_amoled_cmd {

	qcom,ulps-enabled;

	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

	qcom,mdss-dsi-display-timings {

		timing@0 {
@@ -215,6 +217,7 @@ 
};



&dsi_sharp_4k_dsc_cmd {

	qcom,ulps-enabled;

	qcom,esd-check-enabled;

	qcom,mdss-dsi-panel-status-check-mode = "reg_read";

	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0c];
@@ -254,6 +257,7 @@ 
};



&dsi_sharp_1080_cmd {

	qcom,ulps-enabled;

	qcom,esd-check-enabled;

	qcom,mdss-dsi-panel-status-check-mode = "reg_read";

	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
@@ -274,6 +278,7 @@ 
};



&dsi_sharp_qsync_wqhd_cmd {

	qcom,ulps-enabled;

	qcom,esd-check-enabled;

	qcom,mdss-dsi-panel-status-check-mode = "reg_read";

	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
@@ -371,6 +376,7 @@ 
};



&dsi_dual_nt35597_truly_cmd {

	qcom,ulps-enabled;

	qcom,esd-check-enabled;

	qcom,mdss-dsi-panel-status-check-mode = "reg_read";

	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
@@ -421,6 +427,7 @@ 
};



&dsi_nt35695b_truly_fhd_cmd {

	qcom,ulps-enabled;

	qcom,esd-check-enabled;

	qcom,mdss-dsi-panel-status-check-mode = "reg_read";

	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
@@ -440,6 +447,7 @@ 
};



&dsi_sim_cmd {

	qcom,ulps-enabled;

	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

	qcom,mdss-dsi-display-timings {

		timing@0 { /* WQHD 60FPS cmd mode*/
@@ -498,6 +506,7 @@ 
};



&dsi_sim_dsc_375_cmd {

	qcom,ulps-enabled;

	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

	qcom,mdss-dsi-display-timings {

		timing@0 { /* 1080p */
@@ -519,6 +528,7 @@ 
};



&dsi_sim_dsc_10b_cmd {

	qcom,ulps-enabled;

	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

	qcom,mdss-dsi-display-timings {

		timing@0 { /* QHD 60fps */
@@ -547,6 +557,7 @@ 
};



&dsi_dual_sim_cmd {

	qcom,ulps-enabled;

	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";



	qcom,mdss-dsi-display-timings {
@@ -595,6 +606,7 @@ 
};



&dsi_dual_sim_dsc_375_cmd {

	qcom,ulps-enabled;

	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";

	qcom,mdss-dsi-display-timings {

		timing@0 { /* 4k  30 FPS*/