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Commit c404a2f1 authored by Satya Rama Aditya Pinapala's avatar Satya Rama Aditya Pinapala
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disp: msm: dsi: check bit clock before bypassing clock set during DMS



This change ensures that if the dsi clock rate is not specified
in the timing modes, setting clkrate_change_pending is not bypassed.

Change-Id: I2475da1e548f29c68a6a4466c5ef540f7f11d553
Signed-off-by: default avatarSatya Rama Aditya Pinapala <psraditya30@codeaurora.org>
parent 8bc240b7
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+1 −1
Original line number Diff line number Diff line
@@ -4520,7 +4520,7 @@ static int dsi_display_set_mode_sub(struct dsi_display *display,
		commit_phy_timing = true;

		/* No need to set clkrate pending flag if clocks are same */
		if (cur_bitclk != to_bitclk)
		if ((!cur_bitclk && !to_bitclk) || (cur_bitclk != to_bitclk))
			atomic_set(&display->clkrate_change_pending, 1);

		dsi_display_validate_dms_fps(display->panel->cur_mode, mode);