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Commit c3c1acaf authored by Richard Weinberger's avatar Richard Weinberger
Browse files

Merge tag 'nand/for-5.4' of... 

Merge tag 'nand/for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/for-5.4

NAND core
* Fixing typos
* Adding missing of_node_put() in various drivers

Raw NAND controller drivers:
* Macronix: new controller driver
* Omap2: Fixing the number of bitflips returned
* Brcmnand: Fix a pointer not iterating over all the page chunks
* W90x900: Driver removed
* Onenand: Fix a memory leak
* Sharpsl: Missing include guard
* STM32: Avoid warnings when building with W=1
* Ingenic: Fix a coccinelle warning
* r852: Call a helper to simplify the code
parents 089cf7f6 f480b969

Documentation/devicetree/bindings/mtd/mxic-nand.txt

0 → 100644
+36 −0
Original line number Diff line number Diff line 
Macronix Raw NAND Controller Device Tree Bindings

-------------------------------------------------



Required properties:

- compatible: should be "mxic,multi-itfc-v009-nand-controller"

- reg: should contain 1 entry for the registers

- #address-cells: should be set to 1

- #size-cells: should be set to 0

- interrupts: interrupt line connected to this raw NAND controller

- clock-names: should contain "ps", "send" and "send_dly"

- clocks: should contain 3 phandles for the "ps", "send" and

	 "send_dly" clocks



Children nodes:

- children nodes represent the available NAND chips.



See Documentation/devicetree/bindings/mtd/nand-controller.yaml

for more details on generic bindings.



Example:



	nand: nand-controller@43c30000 {

		compatible = "mxic,multi-itfc-v009-nand-controller";

		reg = <0x43c30000 0x10000>;

		#address-cells = <1>;

		#size-cells = <0>;

		interrupts = <GIC_SPI 0x1d IRQ_TYPE_EDGE_RISING>;

		clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;

		clock-names = "send", "send_dly", "ps";



		nand@0 {

			reg = <0>;

			nand-ecc-mode = "soft";

			nand-ecc-algo = "bch";

		};

	};

drivers/mtd/nand/onenand/onenand_base.c

+3 −0
Original line number Diff line number Diff line
@@ -3880,6 +3880,9 @@ int onenand_scan(struct mtd_info *mtd, int maxchips) 
		if (!this->oob_buf) {

			if (this->options & ONENAND_PAGEBUF_ALLOC) {

				this->options &= ~ONENAND_PAGEBUF_ALLOC;

#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE

				kfree(this->verify_buf);

#endif

				kfree(this->page_buf);

			}

			return -ENOMEM;

drivers/mtd/nand/raw/Kconfig

+6 −8
Original line number Diff line number Diff line
@@ -351,14 +351,6 @@ config MTD_NAND_SOCRATES 
	help

	  Enables support for NAND Flash chips wired onto Socrates board.



config MTD_NAND_NUC900

	tristate "Nuvoton NUC9xx/w90p910 NAND controller"

	depends on ARCH_W90X900 || COMPILE_TEST

	depends on HAS_IOMEM

	help

	  This enables the driver for the NAND Flash on evaluation board based

	  on w90p910 / NUC9xx.



source "drivers/mtd/nand/raw/ingenic/Kconfig"



config MTD_NAND_FSMC
@@ -407,6 +399,12 @@ config MTD_NAND_MTK 
	  Enables support for NAND controller on MTK SoCs.

	  This controller is found on mt27xx, mt81xx, mt65xx SoCs.



config MTD_NAND_MXIC

	tristate "Macronix raw NAND controller"

	depends on HAS_IOMEM || COMPILE_TEST

	help

	  This selects the Macronix raw NAND controller driver.



config MTD_NAND_TEGRA

	tristate "NVIDIA Tegra NAND controller"

	depends on ARCH_TEGRA || COMPILE_TEST

drivers/mtd/nand/raw/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -41,7 +41,6 @@ obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_flctl.o 
obj-$(CONFIG_MTD_NAND_MXC)		+= mxc_nand.o

obj-$(CONFIG_MTD_NAND_SOCRATES)		+= socrates_nand.o

obj-$(CONFIG_MTD_NAND_TXX9NDFMC)	+= txx9ndfmc.o

obj-$(CONFIG_MTD_NAND_NUC900)		+= nuc900_nand.o

obj-$(CONFIG_MTD_NAND_MPC5121_NFC)	+= mpc5121_nfc.o

obj-$(CONFIG_MTD_NAND_VF610_NFC)	+= vf610_nfc.o

obj-$(CONFIG_MTD_NAND_RICOH)		+= r852.o
@@ -54,6 +53,7 @@ obj-$(CONFIG_MTD_NAND_HISI504) += hisi504_nand.o 
obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand/

obj-$(CONFIG_MTD_NAND_QCOM)		+= qcom_nandc.o

obj-$(CONFIG_MTD_NAND_MTK)		+= mtk_ecc.o mtk_nand.o

obj-$(CONFIG_MTD_NAND_MXIC)		+= mxic_nand.o

obj-$(CONFIG_MTD_NAND_TEGRA)		+= tegra_nand.o

obj-$(CONFIG_MTD_NAND_STM32_FMC2)	+= stm32_fmc2_nand.o

obj-$(CONFIG_MTD_NAND_MESON)		+= meson_nand.o

drivers/mtd/nand/raw/brcmnand/brcmnand.c

+4 −1
Original line number Diff line number Diff line
@@ -1792,6 +1792,7 @@ static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, 
	int bitflips = 0;

	int page = addr >> chip->page_shift;

	int ret;

	void *ecc_chunk;



	if (!buf)

		buf = nand_get_data_buf(chip);
@@ -1804,7 +1805,9 @@ static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, 
		return ret;



	for (i = 0; i < chip->ecc.steps; i++, oob += sas) {

		ret = nand_check_erased_ecc_chunk(buf, chip->ecc.size,

		ecc_chunk = buf + chip->ecc.size * i;

		ret = nand_check_erased_ecc_chunk(ecc_chunk,

						  chip->ecc.size,

						  oob, sas, NULL, 0,

						  chip->ecc.strength);

		if (ret < 0)