dt-bindings: devfreq: Add DT bindings for devfreq_icc device

MSM devfreq icc device

devfreq icc is a device that represents a MSM device's BW requirements from its

master port(s) to a different device's slave port(s) in a MSM SoC. This

device is typically used to vote for BW requirements from a device's (Eg:

CPU, GPU) master port(s) to the slave (Eg: DDR) port(s).

Required properties:

- compatible:		Must be "qcom,devfreq-icc"

- interconnects:	Pairs of phandles and interconnect provider specificers

			to denote the edge source and destination ports of the

			desired interconnect path.

- qcom,bw-tbl:		A list of meaningful instantaneous bandwidth values

			(in MB/s) that can be requested from the device

			master port to the slave port. The list of values

			depend on the supported bus/slave frequencies and the

			bus width.

Optional properties:

- qcom,active-only:	Indicates that the bandwidth votes need to be

			enforced only when the CPU subsystem is active.

- governor:		Initial governor to use for the device.

			Default: "performance"

Example:

	qcom,cpubw {

		compatible = "qcom,devfreq-icc";

		interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>;

		qcom,active-only;

		qcom,bw-tbl =

			<  572 /*  75 MHz */ >,

			< 1144 /* 150 MHz */ >,

			< 1525 /* 200 MHz */ >,

			< 2342 /* 307 MHz */ >,

			< 3509 /* 460 MHz */ >,

			< 4684 /* 614 MHz */ >,

			< 6103 /* 800 MHz */ >,

			< 7102 /* 931 MHz */ >;

	};