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Commit c32e176a authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v4.14-rockchip-dts32-2' of... 

Merge tag 'v4.14-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "second round of Rockchip dts32 changes for 4.14" from Heiko Stübner:

A lot of attention for the rv1108 soc targetted at media-processing
(usb, operating points, spi, pwm, adc, watchdog, i2c and devices for
its evb).

RK3228/3229 gets iommu and spi nodes. Similar to the rk3288 which
also gets some more iommu nodes as well as getting converted to 64
bit addresses due to wanting to address more than 4GB of memory
via LPAE.

* tag 'v4.14-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  ARM: dts: rockchip: enable usb for rv1108-evb
  ARM: dts: rockchip: add usb nodes for rv1108 SoCs
  dt-bindings: update grf-binding for rv1108 SoCs
  ARM: dts: rockchip: add cpu power supply for rv1108 evb
  ARM: dts: rockchip: add cpu opp table for rv1108
  ARM: dts: rockchip: add rk322x iommu nodes
  ARM: dts: rockchip: add accelerometer bma250e dt node for rv1108 evb
  ARM: dts: rockchip: add pmic rk805 dt node for rv1108 evb
  ARM: dts: rockchip: add pwm backlight for rv1108 evb
  ARM: dts: rockchip: add pwm dt nodes for rv1108
  ARM: dts: rockchip: add spi dt node for rv1108
  ARM: dts: rockchip: add saradc support for rv1108
  ARM: dts: rockchip: add watchdog dt node for rv1108
  ARM: dts: rockchip: add i2c dt nodes for rv1108
  clk: rockchip: fix up indentation of some RV1108 clock-ids
  clk: rockchip: rename the clk id for HCLK_I2S1_2CH
  clk: rockchip: add more clk ids for rv1108
  ARM: dts: rockchip: add more iommu nodes on rk3288
  ARM: dts: rockchip: convert rk3288 device tree files to 64 bits
  ARM: dts: rockchip: add spi node and spi pinctrl on rk3228/rk3229

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 7bf53b96 274ff50d

Documentation/devicetree/bindings/soc/rockchip/grf.txt

+3 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ Required Properties: 
   - "rockchip,rk3328-grf", "syscon": for rk3328

   - "rockchip,rk3368-grf", "syscon": for rk3368

   - "rockchip,rk3399-grf", "syscon": for rk3399

   - "rockchip,rv1108-grf", "syscon": for rv1108

- compatible: PMUGRF should be one of the following:

   - "rockchip,rk3368-pmugrf", "syscon": for rk3368

   - "rockchip,rk3399-pmugrf", "syscon": for rk3399
@@ -28,6 +29,8 @@ Required Properties: 
   - "rockchip,rk3288-sgrf", "syscon": for rk3288

- compatible: USB2PHYGRF should be one of the followings

   - "rockchip,rk3328-usb2phy-grf", "syscon": for rk3328

- compatible: USBGRF should be one of the following

   - "rockchip,rv1108-usbgrf", "syscon": for rv1108

- reg: physical base address of the controller and length of memory mapped

  region.

arch/arm/boot/dts/rk322x.dtsi

+86 −0
Original line number Diff line number Diff line
@@ -55,6 +55,7 @@ 
		serial0 = &uart0;

		serial1 = &uart1;

		serial2 = &uart2;

		spi0 = &spi0;

	};



	cpus {
@@ -405,6 +406,19 @@ 
		status = "disabled";

	};



	spi0: spi@11090000 {

		compatible = "rockchip,rk3228-spi";

		reg = <0x11090000 0x1000>;

		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;

		clock-names = "spiclk", "apb_pclk";

		pinctrl-names = "default";

		pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0 &spi0_cs1>;

		status = "disabled";

	};



	wdt: watchdog@110a0000 {

		compatible = "snps,dw-wdt";

		reg = <0x110a0000 0x100>;
@@ -544,6 +558,42 @@ 
		status = "disabled";

	};



	vpu_mmu: iommu@20020800 {

		compatible = "rockchip,iommu";

		reg = <0x20020800 0x100>;

		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "vpu_mmu";

		iommu-cells = <0>;

		status = "disabled";

	};



	vdec_mmu: iommu@20030480 {

		compatible = "rockchip,iommu";

		reg = <0x20030480 0x40>, <0x200304c0 0x40>;

		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "vdec_mmu";

		iommu-cells = <0>;

		status = "disabled";

	};



	vop_mmu: iommu@20053f00 {

		compatible = "rockchip,iommu";

		reg = <0x20053f00 0x100>;

		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "vop_mmu";

		iommu-cells = <0>;

		status = "disabled";

	};



	iep_mmu: iommu@20070800 {

		compatible = "rockchip,iommu";

		reg = <0x20070800 0x100>;

		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "iep_mmu";

		iommu-cells = <0>;

		status = "disabled";

	};



	sdmmc: dwmmc@30000000 {

		compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";

		reg = <0x30000000 0x4000>;
@@ -900,6 +950,42 @@ 
			};

		};



		spi-0 {

			spi0_clk: spi0-clk {

				rockchip,pins = <0 9 RK_FUNC_2 &pcfg_pull_up>;

			};

			spi0_cs0: spi0-cs0 {

				rockchip,pins = <0 14 RK_FUNC_2 &pcfg_pull_up>;

			};

			spi0_tx: spi0-tx {

				rockchip,pins = <0 11 RK_FUNC_2 &pcfg_pull_up>;

			};

			spi0_rx: spi0-rx {

				rockchip,pins = <0 13 RK_FUNC_2 &pcfg_pull_up>;

			};

			spi0_cs1: spi0-cs1 {

				rockchip,pins = <1 12 RK_FUNC_1 &pcfg_pull_up>;

			};

		};



		spi-1 {

			spi1_clk: spi1-clk {

				rockchip,pins = <0 23 RK_FUNC_2 &pcfg_pull_up>;

			};

			spi1_cs0: spi1-cs0 {

				rockchip,pins = <2 2 RK_FUNC_2 &pcfg_pull_up>;

			};

			spi1_rx: spi1-rx {

				rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_up>;

			};

			spi1_tx: spi1-tx {

				rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_up>;

			};

			spi1_cs1: spi1-cs1 {

				rockchip,pins = <2 3 RK_FUNC_2 &pcfg_pull_up>;

			};

		};



		i2s1 {

			i2s1_bus: i2s1-bus {

				rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_none>,

arch/arm/boot/dts/rk3288-evb.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -45,7 +45,7 @@ 
/ {

	memory@0 {

		device_type = "memory";

		reg = <0x0 0x80000000>;

		reg = <0x0 0x0 0x0 0x80000000>;

	};



	adc-keys {

arch/arm/boot/dts/rk3288-fennec.dts

+1 −1
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ 
	compatible = "rockchip,rk3288-fennec", "rockchip,rk3288";



	memory@0 {

		reg = <0x0 0x80000000>;

		reg = <0x0 0x0 0x0 0x80000000>;

		device_type = "memory";

	};

arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ 
/ {

	memory@0 {

		device_type = "memory";

		reg = <0 0x80000000>;

		reg = <0x0 0x0 0x0 0x80000000>;

	};



	ext_gmac: external-gmac-clock {