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Commit c312c98f authored by Sankeerth Billakanti's avatar Sankeerth Billakanti Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add dp dt node for shima target 

Add the DP DT node for Shima target.
DP SST POR resolution of 4K@60 can be supported
without DSC and widebus support. So, the support
for DSC, FEC and widebus is not required.

Change-Id: Ife3e4806fd116fce3eb1709fd8c73f03446b074c
parent 560f5f6f

display/shima-sde.dtsi

+142 −0
Original line number Diff line number Diff line
@@ -269,6 +269,148 @@ 
		};

	};



	ext_disp: qcom,msm-ext-disp {

		status = "disabled";

		compatible = "qcom,msm-ext-disp";



		ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx {

			compatible = "qcom,msm-ext-disp-audio-codec-rx";

		};

	};



	qcom_msmhdcp: qcom,msm_hdcp {

		status = "disabled";

		compatible = "qcom,msm-hdcp";

	};



	sde_dp: qcom,dp_display@ae90000 {

		status = "disabled";

		cell-index = <0>;

		compatible = "qcom,dp-display";



		/* usb-phy = <&usb_qmp_dp_phy>; */

		/* qcom,dp-aux-switch = <&fsa4480>; */

		qcom,ext-disp = <&ext_disp>;

		qcom,altmode-dev = <&altmode 0>;

		usb-controller = <&usb0>;



		reg =   <0xae90000 0x0dc>,

			<0xae90200 0x0c0>,

			<0xae90400 0x508>,

			<0xae91000 0x094>,

			<0x88eaa00 0x200>,

			<0x88ea200 0x200>,

			<0x88ea600 0x200>,

			<0xaf02004 0x1a0>,

			<0x88ea000 0x200>,

			<0x88e8000 0x20>,

			<0x0aee1000 0x034>,

			<0xae91400 0x094>,

			<0xaf03000 0x8>;

		reg-names = "dp_ahb", "dp_aux", "dp_link",

			"dp_p0", "dp_phy", "dp_ln_tx0", "dp_ln_tx1",

			"dp_mmss_cc", "dp_pll", "usb3_dp_com",

			"hdcp_physical", "dp_p1", "gdsc";



		interrupt-parent = <&mdss_mdp>;

		interrupts = <12 0>;



		#clock-cells = <1>;

		clocks =  <&clock_dispcc DISP_CC_MDSS_DP_AUX_CLK>,

			<&clock_rpmh RPMH_CXO_CLK>,

			<&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,

			<&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK>,

			<&clock_dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,

			<&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,

			<&sde_dp DP_PHY_PLL_VCO_DIV_CLK>,

			<&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>,

			<&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,

			<&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;

		clock-names = "core_aux_clk", "core_usb_ref_clk_src",

			"core_usb_pipe_clk", "link_clk", "link_iface_clk",

			"pixel_clk_rcg", "pixel_parent", "pixel1_clk_rcg",

			"strm0_pixel_clk", "strm1_pixel_clk";



		qcom,pll-revision = "5nm-v1";

		qcom,phy-version = <0x420>;

		qcom,aux-cfg0-settings = [20 00];

		qcom,aux-cfg1-settings = [24 13];

		qcom,aux-cfg2-settings = [28 A4];

		qcom,aux-cfg3-settings = [2c 00];

		qcom,aux-cfg4-settings = [30 0a];

		qcom,aux-cfg5-settings = [34 26];

		qcom,aux-cfg6-settings = [38 0a];

		qcom,aux-cfg7-settings = [3c 03];

		qcom,aux-cfg8-settings = [40 b7];

		qcom,aux-cfg9-settings = [44 03];



		qcom,max-pclk-frequency-khz = <675000>;



		qcom,mst-enable;



		vdda-1p2-supply = <&L6B>;

		vdda-0p9-supply = <&L1B>;

		vdd_mx-supply = <&VDD_MXA_LEVEL>;



		qcom,ctrl-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,ctrl-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdda-1p2";

				qcom,supply-min-voltage = <1200000>;

				qcom,supply-max-voltage = <1200000>;

				qcom,supply-enable-load = <21700>;

				qcom,supply-disable-load = <0>;

			};

		};



		qcom,phy-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,phy-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdda-0p9";

				qcom,supply-min-voltage = <912000>;

				qcom,supply-max-voltage = <912000>;

				qcom,supply-enable-load = <115000>;

				qcom,supply-disable-load = <0>;

			};

		};



		qcom,core-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,core-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "refgen";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};

		};



		qcom,pll-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,pll-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdd_mx";

				qcom,supply-min-voltage =

						<RPMH_REGULATOR_LEVEL_TURBO>;

				qcom,supply-max-voltage =

						<RPMH_REGULATOR_LEVEL_MAX>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};

		};

	};



	sde_rscc: qcom,sde_rscc {

		cell-index = <0>;

		compatible = "qcom,sde-rsc";