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Commit c3083c80 authored by Amit Kucheria's avatar Amit Kucheria Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: msm8998: Add PSCI cpuidle low power states 



Add device bindings for cpuidle states for cpu devices.

[marc: rebase, fix arm,psci-suspend-param, fix entry-latency-us]
Acked-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: default avatarAmit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: default avatarMarc Gonzalez <marc.w.gonzalez@free.fr>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent e76c3672

arch/arm64/boot/dts/qcom/msm8998.dtsi

+50 −0
Original line number Diff line number Diff line
@@ -79,6 +79,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x0>;

			enable-method = "psci";

			cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;

			next-level-cache = <&L2_0>;

			L2_0: l2-cache {

				compatible = "arm,arch-cache";
@@ -97,6 +98,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x1>;

			enable-method = "psci";

			cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;

			next-level-cache = <&L2_0>;

			L1_I_1: l1-icache {

				compatible = "arm,arch-cache";
@@ -111,6 +113,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x2>;

			enable-method = "psci";

			cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;

			next-level-cache = <&L2_0>;

			L1_I_2: l1-icache {

				compatible = "arm,arch-cache";
@@ -125,6 +128,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x3>;

			enable-method = "psci";

			cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;

			next-level-cache = <&L2_0>;

			L1_I_3: l1-icache {

				compatible = "arm,arch-cache";
@@ -139,6 +143,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x100>;

			enable-method = "psci";

			cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;

			next-level-cache = <&L2_1>;

			L2_1: l2-cache {

				compatible = "arm,arch-cache";
@@ -157,6 +162,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x101>;

			enable-method = "psci";

			cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;

			next-level-cache = <&L2_1>;

			L1_I_101: l1-icache {

				compatible = "arm,arch-cache";
@@ -171,6 +177,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x102>;

			enable-method = "psci";

			cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;

			next-level-cache = <&L2_1>;

			L1_I_102: l1-icache {

				compatible = "arm,arch-cache";
@@ -185,6 +192,7 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x103>;

			enable-method = "psci";

			cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;

			next-level-cache = <&L2_1>;

			L1_I_103: l1-icache {

				compatible = "arm,arch-cache";
@@ -231,6 +239,48 @@ 
				};

			};

		};



		idle-states {

			entry-method = "psci";



			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {

				compatible = "arm,idle-state";

				idle-state-name = "little-retention";

				arm,psci-suspend-param = <0x00000002>;

				entry-latency-us = <81>;

				exit-latency-us = <86>;

				min-residency-us = <200>;

			};



			LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {

				compatible = "arm,idle-state";

				idle-state-name = "little-power-collapse";

				arm,psci-suspend-param = <0x40000003>;

				entry-latency-us = <273>;

				exit-latency-us = <612>;

				min-residency-us = <1000>;

				local-timer-stop;

			};



			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {

				compatible = "arm,idle-state";

				idle-state-name = "big-retention";

				arm,psci-suspend-param = <0x00000002>;

				entry-latency-us = <79>;

				exit-latency-us = <82>;

				min-residency-us = <200>;

			};



			BIG_CPU_SLEEP_1: cpu-sleep-1-1 {

				compatible = "arm,idle-state";

				idle-state-name = "big-power-collapse";

				arm,psci-suspend-param = <0x40000003>;

				entry-latency-us = <336>;

				exit-latency-us = <525>;

				min-residency-us = <1000>;

				local-timer-stop;

			};

		};

	};



	firmware {