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This change is a performance optimization. Instead of sending a DRI deassert command at the end of a Data Ready DRI, the FW shall get a FIFO empty internal signal. FW sets the don't deassert bit in relevant cases, like Data Ready DRI, or SYSASSERT DRI. Change-Id: I810e891a82b80c256857987b446c2162bacc399e Signed-off-by:Gidon Studinski <gidons@codeaurora.org> Signed-off-by:
Alexei Avshalom Lazar <ailizaro@codeaurora.org>