ARM: dts: msm: Add support to pass MSI address size on Lahaina

Some targets need to set the MSI address size same as the
PCIe data size(bytes) that PCIe core will halt for each write
transaction. Hence add a property to pass the exponent (base 2)
value for the size. Not setting this value same as PCIe core
write halt size results into a deadlock on system bus.

Change-Id: I9d8dd27fdb7ee25d5673a0fc96bf43f0aa6013ab