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Commit c178b003 authored by Jerome Brunet's avatar Jerome Brunet Committed by Neil Armstrong
Browse files

clk: meson: remove special gp0 lock loop 



After testing, it appears that the gxl (and axg) does not require the
special locking/reset loop which was initially added for it.

All the values present in the gxl table can locked with the simple lock
checking loop.

The change switches the gxl and axg gp0 back to the simple lock checking
loop and removes the code no longer required.

Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
parent 117863e8

drivers/clk/meson/axg.c

+0 −1
Original line number Original line Diff line number Diff line
@@ -231,7 +231,6 @@ static struct clk_regmap axg_gp0_pll = { 
		.table = axg_gp0_pll_rate_table,

		.table = axg_gp0_pll_rate_table,

		.init_regs = axg_gp0_init_regs,

		.init_regs = axg_gp0_init_regs,

		.init_count = ARRAY_SIZE(axg_gp0_init_regs),

		.init_count = ARRAY_SIZE(axg_gp0_init_regs),

		.flags = CLK_MESON_PLL_LOCK_LOOP_RST,

	},

	},

	.hw.init = &(struct clk_init_data){

	.hw.init = &(struct clk_init_data){

		.name = "gp0_pll",

		.name = "gp0_pll",

drivers/clk/meson/clk-pll.c

+1 −11
Original line number Original line Diff line number Diff line
@@ -121,19 +121,9 @@ static int meson_clk_pll_wait_lock(struct clk_hw *hw) 
{

{

	struct clk_regmap *clk = to_clk_regmap(hw);

	struct clk_regmap *clk = to_clk_regmap(hw);

	struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);

	struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);

	int delay = pll->flags & CLK_MESON_PLL_LOCK_LOOP_RST ?

	int delay = 24000000;

		100 : 24000000;





	do {

	do {

		/* Specific wait loop for GXL/GXM GP0 PLL */

		if (pll->flags & CLK_MESON_PLL_LOCK_LOOP_RST) {

			/* Procedure taken from the vendor kernel */

			meson_parm_write(clk->map, &pll->rst, 1);

			udelay(10);

			meson_parm_write(clk->map, &pll->rst, 0);

			mdelay(1);

		}



		/* Is the clock locked now ? */

		/* Is the clock locked now ? */

		if (meson_parm_read(clk->map, &pll->l))

		if (meson_parm_read(clk->map, &pll->l))

			return 0;

			return 0;

drivers/clk/meson/clkc.h

+0 −2
Original line number Original line Diff line number Diff line
@@ -82,8 +82,6 @@ struct pll_rate_table { 
		.frac		= (_frac),				\

		.frac		= (_frac),				\

	}								\

	}								\





#define CLK_MESON_PLL_LOCK_LOOP_RST	BIT(0)



struct meson_clk_pll_data {

struct meson_clk_pll_data {

	struct parm m;

	struct parm m;

	struct parm n;

	struct parm n;

drivers/clk/meson/gxbb.c

+0 −1
Original line number Original line Diff line number Diff line
@@ -475,7 +475,6 @@ static struct clk_regmap gxl_gp0_pll = { 
		.table = gxl_gp0_pll_rate_table,

		.table = gxl_gp0_pll_rate_table,

		.init_regs = gxl_gp0_init_regs,

		.init_regs = gxl_gp0_init_regs,

		.init_count = ARRAY_SIZE(gxl_gp0_init_regs),

		.init_count = ARRAY_SIZE(gxl_gp0_init_regs),

		.flags = CLK_MESON_PLL_LOCK_LOOP_RST,

	},

	},

	.hw.init = &(struct clk_init_data){

	.hw.init = &(struct clk_init_data){

		.name = "gp0_pll",

		.name = "gp0_pll",