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Commit c150d993 authored by Can Guo's avatar Can Guo
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msm: ep-pcie: Correct two CAP reg offsets



Correct the offsets of L1SUB_CAPABILITY_REG and L1SUB_CONTROL1_REG.

Change-Id: I6130a7eab50d85e34d87c28bde3a48c058ee9eee
Signed-off-by: default avatarCan Guo <cang@codeaurora.org>
parent bab76a95
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+2 −2
Original line number Diff line number Diff line
@@ -105,8 +105,8 @@
#define PCIE20_CAP_LINKCTRLSTATUS      0x80
#define PCIE20_DEVICE_CONTROL2_STATUS2 0x98
#define PCIE20_LINK_CONTROL2_LINK_STATUS2 0xA0
#define PCIE20_L1SUB_CAPABILITY        0x154
#define PCIE20_L1SUB_CONTROL1          0x158
#define PCIE20_L1SUB_CAPABILITY        0x234
#define PCIE20_L1SUB_CONTROL1          0x238
#define PCIE20_BUS_DISCONNECT_STATUS   0x68c
#define PCIE20_ACK_F_ASPM_CTRL_REG     0x70C
#define PCIE20_MASK_ACK_N_FTS          0xff00