Loading qcom/shima.dtsi +33 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ #include <dt-bindings/clock/qcom,videocc-shima.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,ipcc.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> / { model = "Qualcomm Technologies, Inc. Shima"; Loading Loading @@ -798,6 +799,38 @@ mboxes = <&qmp_aop 0>; mbox-names = "aop"; }; apps_rsc: rsc@18200000 { label = "apps_rsc"; compatible = "qcom,rpmh-rsc"; reg = <0x18200000 0x10000>, <0x18210000 0x10000>, <0x18220000 0x10000>; reg-names = "drv-0", "drv-1", "drv-2"; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; qcom,tcs-offset = <0xd00>; qcom,drv-id = <2>; qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, <WAKE_TCS 3>, <CONTROL_TCS 1>; }; disp_rsc: rsc@af20000 { label = "disp_rsc"; compatible = "qcom,rpmh-rsc"; reg = <0xaf20000 0x10000>; reg-names = "drv-0"; interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; qcom,tcs-offset = <0x1c00>; qcom,drv-id = <0>; qcom,tcs-config = <ACTIVE_TCS 0>, <SLEEP_TCS 1>, <WAKE_TCS 1>, <CONTROL_TCS 0>; }; }; #include "shima-pinctrl.dtsi" Loading Loading
qcom/shima.dtsi +33 −0 Original line number Diff line number Diff line Loading @@ -7,6 +7,7 @@ #include <dt-bindings/clock/qcom,videocc-shima.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,ipcc.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> / { model = "Qualcomm Technologies, Inc. Shima"; Loading Loading @@ -798,6 +799,38 @@ mboxes = <&qmp_aop 0>; mbox-names = "aop"; }; apps_rsc: rsc@18200000 { label = "apps_rsc"; compatible = "qcom,rpmh-rsc"; reg = <0x18200000 0x10000>, <0x18210000 0x10000>, <0x18220000 0x10000>; reg-names = "drv-0", "drv-1", "drv-2"; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; qcom,tcs-offset = <0xd00>; qcom,drv-id = <2>; qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>, <WAKE_TCS 3>, <CONTROL_TCS 1>; }; disp_rsc: rsc@af20000 { label = "disp_rsc"; compatible = "qcom,rpmh-rsc"; reg = <0xaf20000 0x10000>; reg-names = "drv-0"; interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; qcom,tcs-offset = <0x1c00>; qcom,drv-id = <0>; qcom,tcs-config = <ACTIVE_TCS 0>, <SLEEP_TCS 1>, <WAKE_TCS 1>, <CONTROL_TCS 0>; }; }; #include "shima-pinctrl.dtsi" Loading