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Commit bf4f2fb0 authored by Patrik Jakobsson's avatar Patrik Jakobsson Committed by Jani Nikula
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drm/i915/skl/kbl: Add support for pipe fusing 



On SKL and KBL we can have pipe A/B/C disabled by fuse settings. The
pipes must be fused in descending order (e.g. C, B+C, A+B+C). We simply
decrease info->num_pipes if we find a valid fused out config.

v2: Don't store the pipe disabled mask in device info (Damien)

v3: Don't check FUSE_STRAP register for pipe c disabled

Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarPatrik Jakobsson <patrik.jakobsson@linux.intel.com>
Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
[Jani: fixed some checkpatch indentation complaints]
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1453300280-10661-1-git-send-email-patrik.jakobsson@linux.intel.com
parent 65f61b42

drivers/gpu/drm/i915/i915_dma.c

+31 −0
Original line number Diff line number Diff line
@@ -809,6 +809,37 @@ static void intel_device_info_runtime_init(struct drm_device *dev) 
			DRM_INFO("Display fused off, disabling\n");

			info->num_pipes = 0;

		}

	} else if (info->num_pipes > 0 && INTEL_INFO(dev)->gen == 9) {

		u32 dfsm = I915_READ(SKL_DFSM);

		u8 disabled_mask = 0;

		bool invalid;

		int num_bits;



		if (dfsm & SKL_DFSM_PIPE_A_DISABLE)

			disabled_mask |= BIT(PIPE_A);

		if (dfsm & SKL_DFSM_PIPE_B_DISABLE)

			disabled_mask |= BIT(PIPE_B);

		if (dfsm & SKL_DFSM_PIPE_C_DISABLE)

			disabled_mask |= BIT(PIPE_C);



		num_bits = hweight8(disabled_mask);



		switch (disabled_mask) {

		case BIT(PIPE_A):

		case BIT(PIPE_B):

		case BIT(PIPE_A) | BIT(PIPE_B):

		case BIT(PIPE_A) | BIT(PIPE_C):

			invalid = true;

			break;

		default:

			invalid = false;

		}



		if (num_bits > info->num_pipes || invalid)

			DRM_ERROR("invalid pipe fuse configuration: 0x%x\n",

				  disabled_mask);

		else

			info->num_pipes -= num_bits;

	}



	/* Initialize slice/subslice/EU info */

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Diff line number Diff line
@@ -5994,6 +5994,9 @@ enum skl_disp_power_wells { 
#define SKL_DFSM_CDCLK_LIMIT_540	(1 << 23)

#define SKL_DFSM_CDCLK_LIMIT_450	(2 << 23)

#define SKL_DFSM_CDCLK_LIMIT_337_5	(3 << 23)

#define SKL_DFSM_PIPE_A_DISABLE		(1 << 30)

#define SKL_DFSM_PIPE_B_DISABLE		(1 << 21)

#define SKL_DFSM_PIPE_C_DISABLE		(1 << 28)



#define GEN7_FF_SLICE_CS_CHICKEN1	_MMIO(0x20e0)

#define   GEN9_FFSC_PERCTX_PREEMPT_CTRL	(1<<14)