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Commit bf3ace5c authored by Doug Berger's avatar Doug Berger Committed by Greg Kroah-Hartman
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Revert "net: bcmgenet: use RGMII loopback for MAC reset" 



commit 612eb1c3b9e504de24136c947ed7c07bc342f3aa upstream.

This reverts commit 3a55402c.

This is not a good solution when connecting to an external switch
that may not support the isolation of the TXC signal resulting in
output driver contention on the pin.

A different solution is necessary.

Signed-off-by: default avatarDoug Berger <opendmb@gmail.com>
Acked-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
[Adjusted to accommodate lack of commit 4f8d81b77e66]
Signed-off-by: default avatarDoug Berger <opendmb@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 44f04184

drivers/net/ethernet/broadcom/genet/bcmgenet.c

+2 −0
Original line number Diff line number Diff line
@@ -2015,6 +2015,8 @@ static void reset_umac(struct bcmgenet_priv *priv) 


	/* issue soft reset with (rg)mii loopback to ensure a stable rxclk */

	bcmgenet_umac_writel(priv, CMD_SW_RESET | CMD_LCL_LOOP_EN, UMAC_CMD);

	udelay(2);

	bcmgenet_umac_writel(priv, 0, UMAC_CMD);

}



static void bcmgenet_intr_disable(struct bcmgenet_priv *priv)

drivers/net/ethernet/broadcom/genet/bcmmii.c

+0 −33
Original line number Diff line number Diff line
@@ -187,38 +187,8 @@ int bcmgenet_mii_config(struct net_device *dev, bool init) 
	const char *phy_name = NULL;

	u32 id_mode_dis = 0;

	u32 port_ctrl;

	int bmcr = -1;

	int ret;

	u32 reg;



	/* MAC clocking workaround during reset of umac state machines */

	reg = bcmgenet_umac_readl(priv, UMAC_CMD);

	if (reg & CMD_SW_RESET) {

		/* An MII PHY must be isolated to prevent TXC contention */

		if (priv->phy_interface == PHY_INTERFACE_MODE_MII) {

			ret = phy_read(phydev, MII_BMCR);

			if (ret >= 0) {

				bmcr = ret;

				ret = phy_write(phydev, MII_BMCR,

						bmcr | BMCR_ISOLATE);

			}

			if (ret) {

				netdev_err(dev, "failed to isolate PHY\n");

				return ret;

			}

		}

		/* Switch MAC clocking to RGMII generated clock */

		bcmgenet_sys_writel(priv, PORT_MODE_EXT_GPHY, SYS_PORT_CTRL);

		/* Ensure 5 clks with Rx disabled

		 * followed by 5 clks with Reset asserted

		 */

		udelay(4);

		reg &= ~(CMD_SW_RESET | CMD_LCL_LOOP_EN);

		bcmgenet_umac_writel(priv, reg, UMAC_CMD);

		/* Ensure 5 more clocks before Rx is enabled */

		udelay(2);

	}



	priv->ext_phy = !priv->internal_phy &&

			(priv->phy_interface != PHY_INTERFACE_MODE_MOCA);
@@ -250,9 +220,6 @@ int bcmgenet_mii_config(struct net_device *dev, bool init) 
		phy_set_max_speed(phydev, SPEED_100);

		bcmgenet_sys_writel(priv,

				    PORT_MODE_EXT_EPHY, SYS_PORT_CTRL);

		/* Restore the MII PHY after isolation */

		if (bmcr >= 0)

			phy_write(phydev, MII_BMCR, bmcr);

		break;



	case PHY_INTERFACE_MODE_REVMII: