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Commit bf2b337b authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add SD card entries for Lahaina"

parents e1edaafe bc9eb6bf

qcom/lahaina-cdp.dtsi

+19 −0
Original line number Diff line number Diff line
@@ -26,3 +26,22 @@ 
		};

	};

};



&sdhc_2 {

	vdd-supply = <&pm8350c_l9>;

	qcom,vdd-voltage-level = <2950000 2960000>;

	qcom,vdd-current-level = <200 800000>;



	vdd-io-supply = <&pm8350c_l6>;

	qcom,vdd-io-voltage-level = <1808000 2960000>;

	qcom,vdd-io-current-level = <200 22000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on &storage_cd>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>;



	cd-gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;



	status = "disabled";

};

qcom/lahaina-mtp.dtsi

+19 −0
Original line number Diff line number Diff line
@@ -26,3 +26,22 @@ 
		};

	};

};



&sdhc_2 {

	vdd-supply = <&pm8350c_l9>;

	qcom,vdd-voltage-level = <2950000 2960000>;

	qcom,vdd-current-level = <200 800000>;



	vdd-io-supply = <&pm8350c_l6>;

	qcom,vdd-io-voltage-level = <1808000 2960000>;

	qcom,vdd-io-current-level = <200 22000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on &storage_cd>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>;



	cd-gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;



	status = "disabled";

};

qcom/lahaina-pinctrl.dtsi

+61 −0
Original line number Diff line number Diff line
@@ -65,6 +65,67 @@ 
			};

		};



		storage_cd: storage_cd {

			mux {

				pins = "gpio92";

				function = "gpio";

			};



			config {

				pins = "gpio92";

				bias-pull-up;           /* pull up */

				drive-strength = <2>;   /* 2 MA */

			};

		};



		sdc2_clk_on: sdc2_clk_on {

			config {

				pins = "sdc2_clk";

				bias-disable;		/* NO pull */

				drive-strength = <16>;	/* 16 MA */

			};

		};



		sdc2_clk_off: sdc2_clk_off {

			config {

				pins = "sdc2_clk";

				bias-disable;		/* NO pull */

				drive-strength = <2>;	/* 2 MA */

			};

		};



		sdc2_cmd_on: sdc2_cmd_on {

			config {

				pins = "sdc2_cmd";

				bias-pull-up;		/* pull up */

				drive-strength = <16>;	/* 16 MA */

			};

		};



		sdc2_cmd_off: sdc2_cmd_off {

			config {

				pins = "sdc2_cmd";

				bias-pull-up;		/* pull up */

				drive-strength = <2>;	/* 2 MA */

			};

		};



		sdc2_data_on: sdc2_data_on {

			config {

				pins = "sdc2_data";

				bias-pull-up;		/* pull up */

				drive-strength = <16>;	/* 16 MA */

			};

		};



		sdc2_data_off: sdc2_data_off {

			config {

				pins = "sdc2_data";

				bias-pull-up;		/* pull up */

				drive-strength = <2>;	/* 2 MA */

			};

		};



		qupv3_se6_2uart_pins: qupv3_se6_2uart_pins {

			qupv3_se6_default_txrx: qupv3_se6_default_txrx {

				mux {

qcom/lahaina-rumi.dtsi

+19 −0
Original line number Diff line number Diff line 
#include "lahaina-pmic-overlay.dtsi"

#include <dt-bindings/gpio/gpio.h>



&spmi_debug_bus {

	status = "ok";
@@ -39,6 +40,24 @@ 
	status = "ok";

};



&sdhc_2 {

	vdd-supply = <&pm8350c_l9>;

	qcom,vdd-voltage-level = <2950000 2960000>;

	qcom,vdd-current-level = <200 800000>;



	vdd-io-supply = <&pm8350c_l6>;

	qcom,vdd-io-voltage-level = <1808000 2960000>;

	qcom,vdd-io-current-level = <200 22000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on &storage_cd>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>;



	cd-gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;



	status = "disabled";

};



&soc {

	usb_emu_phy_0: usb_emu_phy@a720000 {

		compatible = "qcom,usb-emu-phy";

qcom/lahaina.dtsi

+41 −0
Original line number Diff line number Diff line
@@ -34,6 +34,7 @@ 


	aliases {

		ufshc1 = &ufshc_mem; /* Embedded UFS Slot */

		sdhc2 = &sdhc_2; /* SDC2 SD card slot */

		serial0 = &qupv3_se3_2uart;

		pci-domain0 = &pcie0; /* PCIe0 domain */

		pci-domain1 = &pcie1; /* PCIe1 domain */
@@ -1464,6 +1465,46 @@ 
		status = "disabled";

	};



	sdhc_2: sdhci@8804000 {

		compatible = "qcom,sdhci-msm-v5";

		reg = <0x8804000 0x1000>;

		reg-names = "hc_mem";



		interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,

				<GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "hc_irq", "pwr_irq";



		qcom,bus-width = <4>;

		qcom,large-address-bus;



		qcom,restore-after-cx-collapse;



		qcom,clk-rates = <400000 20000000 25000000

					50000000 100000000 201500000>;

		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50",

				      "SDR104";



		qcom,devfreq,freq-table = <50000000 201500000>;

		clocks = <&clock_gcc GCC_SDCC2_AHB_CLK>,

			<&clock_gcc GCC_SDCC2_APPS_CLK>;

		clock-names = "iface", "core";



		/* PM QoS */

		qcom,pm-qos-irq-type = "affine_irq";

		qcom,pm-qos-irq-latency = <44 44>;

		qcom,pm-qos-cpu-groups = <0x3f 0xc0>;

		qcom,pm-qos-legacy-latency-us = <44 44>, <44 44>;



		/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */

		qcom,dll-hsr-list = <0x0007642C 0xA800 0x10

					0x2C010800 0x80040868>;



		iommus = <&apps_smmu 0x4a0 0x0>;

		qcom,iommu-dma = "bypass";



		status = "disabled";

	};



	kryo-erp {

		compatible = "arm,arm64-kryo-cpu-erp";

		interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>,