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Commit bf2a5e71 authored by Tomasz Figa's avatar Tomasz Figa Committed by Joerg Roedel
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iommu/rockchip: Fix TLB flush of secondary IOMMUs 



Due to the bug in current code, only first IOMMU has the TLB lines
flushed in rk_iommu_zap_lines. This patch fixes the inner loop to
execute for all IOMMUs and properly flush the TLB.

Signed-off-by: default avatarTomasz Figa <tfiga@chromium.org>
Signed-off-by: default avatarJeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 0416bf64

drivers/iommu/rockchip-iommu.c

+7 −5
Original line number Diff line number Diff line
@@ -274,20 +274,22 @@ static void rk_iommu_base_command(void __iomem *base, u32 command) 
{

	writel(command, base + RK_MMU_COMMAND);

}

static void rk_iommu_zap_lines(struct rk_iommu *iommu, dma_addr_t iova,

static void rk_iommu_zap_lines(struct rk_iommu *iommu, dma_addr_t iova_start,

			       size_t size)

{

	int i;



	dma_addr_t iova_end = iova + size;

	dma_addr_t iova_end = iova_start + size;

	/*

	 * TODO(djkurtz): Figure out when it is more efficient to shootdown the

	 * entire iotlb rather than iterate over individual iovas.

	 */

	for (i = 0; i < iommu->num_mmu; i++)

		for (; iova < iova_end; iova += SPAGE_SIZE)

	for (i = 0; i < iommu->num_mmu; i++) {

		dma_addr_t iova;



		for (iova = iova_start; iova < iova_end; iova += SPAGE_SIZE)

			rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova);

	}

}



static bool rk_iommu_is_stall_active(struct rk_iommu *iommu)

{