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Commit bf241682 authored by Guo Ren's avatar Guo Ren
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csky: Reconstruct signal processing



Linux kernel has provided some apis for arch signal's implementation.
For example:
	restore_saved_sigmask()
	set_current_blocked()
	restore_altstack()

But in last version of csky signal.c didn't use them and some codes are
confusing, so reconstruct signal.c with reference to riscv's code.

Now csky signal.c implementation are very close to riscv and we can
get the following benefits:
 - Clear code structure
 - The signal code of riscv and csky can be reviewed together
 - Promoting the unification of arch's signal implementation

Also modified the related code in entry.S

Signed-off-by: default avatarGuo Ren <ren_guo@c-sky.com>
Cc: Arnd Bergmann <arnd@arndb.de>
parent f4625ee0
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+0 −7
Original line number Diff line number Diff line
@@ -16,9 +16,6 @@
#define LSAVE_A4	40
#define LSAVE_A5	44

#define EPC_INCREASE	2
#define EPC_KEEP	0

.macro USPTOKSP
	mtcr	sp, ss1
	mfcr	sp, ss0
@@ -29,10 +26,6 @@
	mfcr	sp, ss1
.endm

.macro INCTRAP	rx
	addi	\rx, EPC_INCREASE
.endm

.macro	SAVE_ALL epc_inc
	mtcr    r13, ss2
	mfcr    r13, epsr
+2 −0
Original line number Diff line number Diff line
@@ -21,4 +21,6 @@

#define SYSTRACE_SAVENUM	2

#define TRAP0_SIZE		2

#endif /* __ASM_CSKY_REGDEF_H */
+0 −7
Original line number Diff line number Diff line
@@ -14,18 +14,11 @@
#define LSAVE_A2	32
#define LSAVE_A3	36

#define EPC_INCREASE	4
#define EPC_KEEP	0

#define KSPTOUSP
#define USPTOKSP

#define usp cr<14, 1>

.macro INCTRAP	rx
	addi	\rx, EPC_INCREASE
.endm

.macro SAVE_ALL epc_inc
	subi    sp, 152
	stw	tls, (sp, 0)
+2 −0
Original line number Diff line number Diff line
@@ -21,4 +21,6 @@

#define SYSTRACE_SAVENUM	5

#define TRAP0_SIZE		4

#endif /* __ASM_CSKY_REGDEF_H */
+4 −22
Original line number Diff line number Diff line
@@ -12,11 +12,10 @@
 * If *ptr != oldval && return 1,
 * else *ptr = newval return 0.
 */
#ifdef CONFIG_CPU_HAS_LDSTEX
ENTRY(csky_cmpxchg)
	USPTOKSP
	mfcr	a3, epc
	INCTRAP	a3
	addi	a3, TRAP0_SIZE

	subi    sp, 8
	stw     a3, (sp, 0)
@@ -24,6 +23,7 @@ ENTRY(csky_cmpxchg)
	stw     a3, (sp, 4)

	psrset	ee
#ifdef CONFIG_CPU_HAS_LDSTEX
1:
	ldex	a3, (a2)
	cmpne	a0, a3
@@ -33,27 +33,7 @@ ENTRY(csky_cmpxchg)
	bez	a3, 1b
2:
	sync.is
	mvc	a0
	ldw	a3, (sp, 0)
	mtcr	a3, epc
	ldw     a3, (sp, 4)
	mtcr	a3, epsr
	addi	sp, 8
	KSPTOUSP
	rte
END(csky_cmpxchg)
#else
ENTRY(csky_cmpxchg)
	USPTOKSP
	mfcr	a3, epc
	INCTRAP	a3

	subi    sp, 8
	stw     a3, (sp, 0)
	mfcr    a3, epsr
	stw     a3, (sp, 4)

	psrset	ee
1:
	ldw	a3, (a2)
	cmpne	a0, a3
@@ -61,6 +41,7 @@ ENTRY(csky_cmpxchg)
2:
	stw	a1, (a2)
3:
#endif
	mvc	a0
	ldw	a3, (sp, 0)
	mtcr	a3, epc
@@ -71,6 +52,7 @@ ENTRY(csky_cmpxchg)
	rte
END(csky_cmpxchg)

#ifndef CONFIG_CPU_HAS_LDSTEX
/*
 * Called from tlbmodified exception
 */
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