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Commit bf039fa9 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/dp: abstract training pattern selection 



Make it cleaner to add more checks in the function. No functional
changes.

Cc: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Cc: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Reviewed-by: default avatarSivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Cc: drm-intel-fixes@lists.freedesktop.org # dependency on the next patch
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1454667370-8001-1-git-send-email-jani.nikula@intel.com


(cherry picked from commit 23a5110d)
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent bfadcded

drivers/gpu/drm/i915/intel_dp_link_training.c

+18 −7
Original line number Diff line number Diff line
@@ -215,16 +215,15 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp) 
	}

}



static void

intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp)

/*

 * Pick training pattern for channel equalization. Training Pattern 3 for HBR2

 * or 1.2 devices that support it, Training Pattern 2 otherwise.

 */

static u32 intel_dp_training_pattern(struct intel_dp *intel_dp)

{

	bool channel_eq = false;

	int tries, cr_tries;

	uint32_t training_pattern = DP_TRAINING_PATTERN_2;

	u32 training_pattern = DP_TRAINING_PATTERN_2;



	/*

	 * Training Pattern 3 for HBR2 or 1.2 devices that support it.

	 *

	 * Intel platforms that support HBR2 also support TPS3. TPS3 support is

	 * also mandatory for downstream devices that support HBR2.

	 *
@@ -237,6 +236,18 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) 
	else if (intel_dp->link_rate == 540000)

		DRM_ERROR("5.4 Gbps link rate without HBR2/TPS3 support\n");



	return training_pattern;

}



static void

intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp)

{

	bool channel_eq = false;

	int tries, cr_tries;

	u32 training_pattern;



	training_pattern = intel_dp_training_pattern(intel_dp);



	/* channel equalization */

	if (!intel_dp_set_link_train(intel_dp,

				     training_pattern |