Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit bec5545e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'ntb-5.3' of git://github.com/jonmason/ntb

Pull NTB updates from Jon Mason:
 "New feature to add support for NTB virtual MSI interrupts, the ability
  to test and use this feature in the NTB transport layer.

  Also, bug fixes for the AMD and Switchtec drivers, as well as some
  general patches"

* tag 'ntb-5.3' of git://github.com/jonmason/ntb: (22 commits)
  NTB: Describe the ntb_msi_test client in the documentation.
  NTB: Add MSI interrupt support to ntb_transport
  NTB: Add ntb_msi_test support to ntb_test
  NTB: Introduce NTB MSI Test Client
  NTB: Introduce MSI library
  NTB: Rename ntb.c to support multiple source files in the module
  NTB: Introduce functions to calculate multi-port resource index
  NTB: Introduce helper functions to calculate logical port number
  PCI/switchtec: Add module parameter to request more interrupts
  PCI/MSI: Support allocating virtual MSI interrupts
  ntb_hw_switchtec: Fix setup MW with failure bug
  ntb_hw_switchtec: Skip unnecessary re-setup of shared memory window for crosslink case
  ntb_hw_switchtec: Remove redundant steps of switchtec_ntb_reinit_peer() function
  NTB: correct ntb_dev_ops and ntb_dev comment typos
  NTB: amd: Silence shift wrapping warning in amd_ntb_db_vector_mask()
  ntb_hw_switchtec: potential shift wrapping bug in switchtec_ntb_init_sndev()
  NTB: ntb_transport: Ensure qp->tx_mw_dma_addr is initaliazed
  NTB: ntb_hw_amd: set peer limit register
  NTB: ntb_perf: Clear stale values in doorbell and command SPAD register
  NTB: ntb_perf: Disable NTB link after clearing peer XLAT registers
  ...
parents f1a3b43c d9c53aa4
Loading
Loading
Loading
Loading
+27 −0
Original line number Diff line number Diff line
@@ -200,6 +200,33 @@ Debugfs Files:
	This file is used to read and write peer scratchpads.  See
	*spad* for details.

NTB MSI Test Client (ntb\_msi\_test)
------------------------------------

The MSI test client serves to test and debug the MSI library which
allows for passing MSI interrupts across NTB memory windows. The
test client is interacted with through the debugfs filesystem:

* *debugfs*/ntb\_tool/*hw*/
	A directory in debugfs will be created for each
	NTB device probed by the tool.  This directory is shortened to *hw*
	below.
* *hw*/port
	This file describes the local port number
* *hw*/irq*_occurrences
	One occurrences file exists for each interrupt and, when read,
	returns the number of times the interrupt has been triggered.
* *hw*/peer*/port
	This file describes the port number for each peer
* *hw*/peer*/count
	This file describes the number of interrupts that can be
	triggered on each peer
* *hw*/peer*/trigger
	Writing an interrupt number (any number less than the value
	specified in count) will trigger the interrupt on the
	specified peer. That peer's interrupt's occurrence file
	should be incremented.

NTB Hardware Drivers
====================

+11 −0
Original line number Diff line number Diff line
@@ -13,6 +13,17 @@ menuconfig NTB

if NTB

config NTB_MSI
	bool "MSI Interrupt Support"
	depends on PCI_MSI
	help
	 Support using MSI interrupt forwarding instead of (or in addition to)
	 hardware doorbells. MSI interrupts typically offer lower latency
	 than doorbells and more MSI interrupts can be made available to
	 clients. However this requires an extra memory window and support
	 in the hardware driver for creating the MSI interrupts.

	 If unsure, say N.
source "drivers/ntb/hw/Kconfig"

source "drivers/ntb/test/Kconfig"
+3 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_NTB) += ntb.o hw/ test/
obj-$(CONFIG_NTB_TRANSPORT) += ntb_transport.o

ntb-y			:= core.o
ntb-$(CONFIG_NTB_MSI)	+= msi.o
+0 −0

File moved.

+5 −5
Original line number Diff line number Diff line
@@ -160,8 +160,8 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx,
		}

		/* set and verify setting the limit */
		write64(limit, mmio + limit_reg);
		reg_val = read64(mmio + limit_reg);
		write64(limit, peer_mmio + limit_reg);
		reg_val = read64(peer_mmio + limit_reg);
		if (reg_val != limit) {
			write64(base_addr, mmio + limit_reg);
			write64(0, peer_mmio + xlat_reg);
@@ -183,8 +183,8 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx,
		}

		/* set and verify setting the limit */
		writel(limit, mmio + limit_reg);
		reg_val = readl(mmio + limit_reg);
		writel(limit, peer_mmio + limit_reg);
		reg_val = readl(peer_mmio + limit_reg);
		if (reg_val != limit) {
			writel(base_addr, mmio + limit_reg);
			writel(0, peer_mmio + xlat_reg);
@@ -333,7 +333,7 @@ static u64 amd_ntb_db_vector_mask(struct ntb_dev *ntb, int db_vector)
	if (db_vector < 0 || db_vector > ndev->db_count)
		return 0;

	return ntb_ndev(ntb)->db_valid_mask & (1 << db_vector);
	return ntb_ndev(ntb)->db_valid_mask & (1ULL << db_vector);
}

static u64 amd_ntb_db_read(struct ntb_dev *ntb)
Loading