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Commit be9bf30c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq 

* master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq:
  [CPUFREQ] kzalloc conversion for gx-suspmod
  [CPUFREQ] Whitespace cleanup
  [CPUFREQ] Mark longhaul driver as broken.
  [PATCH] cpufreq: fix section mismatch warnings
  [CPUFREQ] Fix the p4-clockmod N60 errata workaround.
  [CPUFREQ] Fix handling for CPU hotplug
  [CPUFREQ] powernow-k8: Let cpufreq driver handle affected CPUs
  [CPUFREQ] Lots of whitespace & CodingStyle cleanup.
  [CPUFREQ] Remove duplicate cpuinfo struct
  [CPUFREQ] Silence powernow-k8 warning on k7's.
parents ace48471 84f0b1ef

arch/i386/kernel/cpu/cpufreq/Kconfig

+12 −12
Original line number Diff line number Diff line
@@ -96,7 +96,6 @@ config X86_POWERNOW_K8_ACPI 


config X86_GX_SUSPMOD

	tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation"

	depends on PCI

	help

	 This add the CPUFreq driver for NatSemi Geode processors which

	 support suspend modulation.
@@ -203,6 +202,7 @@ config X86_LONGRUN 
config X86_LONGHAUL

	tristate "VIA Cyrix III Longhaul"

	select CPU_FREQ_TABLE

	depends on BROKEN

	help

	  This adds the CPUFreq driver for VIA Samuel/CyrixIII,

	  VIA Cyrix Samuel/C3, VIA Cyrix Ezra and VIA Cyrix Ezra-T

arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c

+26 −38
Original line number Diff line number Diff line
@@ -57,7 +57,7 @@ MODULE_PARM_DESC(min_fsb, 


#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "cpufreq-nforce2", msg)



/*

/**

 * nforce2_calc_fsb - calculate FSB

 * @pll: PLL value

 *
@@ -76,7 +76,7 @@ static int nforce2_calc_fsb(int pll) 
	return 0;

}



/*

/**

 * nforce2_calc_pll - calculate PLL value

 * @fsb: FSB

 *
@@ -106,7 +106,7 @@ static int nforce2_calc_pll(unsigned int fsb) 
	return NFORCE2_PLL(mul, div);

}



/*

/**

 * nforce2_write_pll - write PLL value to chipset

 * @pll: PLL value

 *
@@ -121,15 +121,13 @@ static void nforce2_write_pll(int pll) 
	pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLADR, temp);



	/* Now write the value in all 64 registers */

	for (temp = 0; temp <= 0x3f; temp++) {

		pci_write_config_dword(nforce2_chipset_dev, 

                                       NFORCE2_PLLREG, pll);

	}

	for (temp = 0; temp <= 0x3f; temp++)

		pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLREG, pll);



	return;

}



/*

/**

 * nforce2_fsb_read - Read FSB

 *

 *   Read FSB from chipset
@@ -140,14 +138,9 @@ static unsigned int nforce2_fsb_read(int bootfsb) 
	struct pci_dev *nforce2_sub5;

	u32 fsb, temp = 0;



	

	/* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */

	nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,

                                      0x01EF,

                                      PCI_ANY_ID,

                                      PCI_ANY_ID,

                                      NULL);

	

						0x01EF,PCI_ANY_ID,PCI_ANY_ID,NULL);

	if (!nforce2_sub5)

		return 0;
@@ -155,21 +148,19 @@ static unsigned int nforce2_fsb_read(int bootfsb) 
	fsb /= 1000000;



	/* Check if PLL register is already set */

	pci_read_config_byte(nforce2_chipset_dev, 

                             NFORCE2_PLLENABLE, (u8 *)&temp);

	pci_read_config_byte(nforce2_chipset_dev,NFORCE2_PLLENABLE, (u8 *)&temp);



	if(bootfsb || !temp)

		return fsb;

		

	/* Use PLL register FSB value */

	pci_read_config_dword(nforce2_chipset_dev, 

                              NFORCE2_PLLREG, &temp);

	pci_read_config_dword(nforce2_chipset_dev,NFORCE2_PLLREG, &temp);

	fsb = nforce2_calc_fsb(temp);



	return fsb;

}



/*

/**

 * nforce2_set_fsb - set new FSB

 * @fsb: New FSB

 *
@@ -194,8 +185,7 @@ static int nforce2_set_fsb(unsigned int fsb) 
	}



	/* First write? Then set actual value */

	pci_read_config_byte(nforce2_chipset_dev, 

                             NFORCE2_PLLENABLE, (u8 *)&temp);

	pci_read_config_byte(nforce2_chipset_dev,NFORCE2_PLLENABLE, (u8 *)&temp);

	if (!temp) {

		pll = nforce2_calc_pll(tfsb);
@@ -406,9 +396,7 @@ static unsigned int nforce2_detect_chipset(void) 


	nforce2_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,

					PCI_DEVICE_ID_NVIDIA_NFORCE2,

                                             PCI_ANY_ID,

                                             PCI_ANY_ID,

                                             NULL);

					PCI_ANY_ID, PCI_ANY_ID, NULL);



	if (nforce2_chipset_dev == NULL)

		return -ENODEV;

arch/i386/kernel/cpu/cpufreq/elanfreq.c

+53 −56
Original line number Diff line number Diff line
@@ -86,16 +86,16 @@ static unsigned int elanfreq_get_cpu_frequency(unsigned int cpu) 
	clockspeed_reg = inb_p(REG_CSCDR);

	local_irq_enable();



        if ((clockspeed_reg & 0xE0) == 0xE0) { return 0; }

	if ((clockspeed_reg & 0xE0) == 0xE0)

		return 0;



	/* Are we in CPU clock multiplied mode (66/99 MHz)? */

	if ((clockspeed_reg & 0xE0) == 0xC0) {

                if ((clockspeed_reg & 0x01) == 0) {

		if ((clockspeed_reg & 0x01) == 0)

			return 66000;

		} else {

		else

			return 99000;

	}

        }



	/* 33 MHz is not 32 MHz... */

	if ((clockspeed_reg & 0xE0)==0xA0)
@@ -117,8 +117,8 @@ static unsigned int elanfreq_get_cpu_frequency(unsigned int cpu) 
 *	There is no return value.

 */



static void elanfreq_set_cpu_state (unsigned int state) {



static void elanfreq_set_cpu_state (unsigned int state)

{

	struct cpufreq_freqs    freqs;



	freqs.old = elanfreq_get_cpu_frequency(0);
@@ -127,7 +127,8 @@ static void elanfreq_set_cpu_state (unsigned int state) { 


	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);



	printk(KERN_INFO "elanfreq: attempting to set frequency to %i kHz\n",elan_multiplier[state].clock);

	printk(KERN_INFO "elanfreq: attempting to set frequency to %i kHz\n",

			elan_multiplier[state].clock);





	/*
@@ -227,7 +228,6 @@ static int elanfreq_cpu_init(struct cpufreq_policy *policy) 
		return (result);



	cpufreq_frequency_table_get_attr(elanfreq_table, policy->cpu);



	return 0;

}
@@ -285,12 +285,10 @@ static int __init elanfreq_init(void) 


	/* Test if we have the right hardware */

	if ((c->x86_vendor != X86_VENDOR_AMD) ||

		(c->x86 != 4) || (c->x86_model!=10))

	{

		(c->x86 != 4) || (c->x86_model!=10)) {

		printk(KERN_INFO "elanfreq: error: no Elan processor found!\n");

                return -ENODEV;

	}

	

	return cpufreq_register_driver(&elanfreq_driver);

}
@@ -309,4 +307,3 @@ MODULE_DESCRIPTION("cpufreq driver for AMD's Elan CPUs"); 


module_init(elanfreq_init);

module_exit(elanfreq_exit);

arch/i386/kernel/cpu/cpufreq/gx-suspmod.c

+90 −93
Original line number Diff line number Diff line
@@ -190,10 +190,9 @@ static __init struct pci_dev *gx_detect_chipset(void) 


	/* detect which companion chip is used */

	while ((gx_pci = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, gx_pci)) != NULL) {

		if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL) {

		if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL)

			return gx_pci;

	}

	}



	dprintk("error: no supported chipset found!\n");

	return NULL;
@@ -258,7 +257,6 @@ static void gx_set_cpuspeed(unsigned int khz) 
	unsigned long flags;

	struct cpufreq_freqs freqs;





	freqs.cpu = 0;

	freqs.old = gx_get_cpuspeed(0);
@@ -461,10 +459,9 @@ static int __init cpufreq_gx_init(void) 


	dprintk("geode suspend modulation available.\n");



	params = kmalloc(sizeof(struct gxfreq_params), GFP_KERNEL);

	params = kzalloc(sizeof(struct gxfreq_params), GFP_KERNEL);

	if (params == NULL)

		return -ENOMEM;

	memset(params, 0, sizeof(struct gxfreq_params));



	params->cs55x0 = gx_pci;

	gx_params = params;

arch/i386/kernel/cpu/cpufreq/p4-clockmod.c

+13 −13
Original line number Diff line number Diff line
@@ -244,7 +244,7 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy) 
	for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {

		if ((i<2) && (has_N44_O17_errata[policy->cpu]))

			p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;

		else if (has_N60_errata[policy->cpu] && p4clockmod_table[i].frequency < 2000000)

		else if (has_N60_errata[policy->cpu] && ((stock_freq * i)/8) < 2000000)

			p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;

		else

			p4clockmod_table[i].frequency = (stock_freq * i)/8;