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Commit be7e87f9 authored by Saeed Mahameed's avatar Saeed Mahameed
Browse files

net/mlx5e: Fail safe cqe compressing/moderation mode setting



Use the new fail-safe channels switch mechanism to set new
CQE compressing and CQE moderation mode settings.

We also move RX CQE compression modify function out of en_rx file  to
a more appropriate place.

Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
Reviewed-by: default avatarTariq Toukan <tariqt@mellanox.com>
parent 546f18ed
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+1 −1
Original line number Diff line number Diff line
@@ -833,7 +833,7 @@ void mlx5e_pps_event_handler(struct mlx5e_priv *priv,
			     struct ptp_clock_event *event);
int mlx5e_hwstamp_set(struct net_device *dev, struct ifreq *ifr);
int mlx5e_hwstamp_get(struct net_device *dev, struct ifreq *ifr);
void mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool val);
int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool val);

int mlx5e_vlan_rx_add_vid(struct net_device *dev, __always_unused __be16 proto,
			  u16 vid);
+7 −1
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ int mlx5e_hwstamp_set(struct net_device *dev, struct ifreq *ifr)
{
	struct mlx5e_priv *priv = netdev_priv(dev);
	struct hwtstamp_config config;
	int err;

	if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
		return -EOPNOTSUPP;
@@ -129,7 +130,12 @@ int mlx5e_hwstamp_set(struct net_device *dev, struct ifreq *ifr)
	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
		/* Disable CQE compression */
		netdev_warn(dev, "Disabling cqe compression");
		mlx5e_modify_rx_cqe_compression_locked(priv, false);
		err = mlx5e_modify_rx_cqe_compression_locked(priv, false);
		if (err) {
			netdev_err(dev, "Failed disabling cqe compression err=%d\n", err);
			mutex_unlock(&priv->state_lock);
			return err;
		}
		config.rx_filter = HWTSTAMP_FILTER_ALL;
		break;
	default:
+43 −10
Original line number Diff line number Diff line
@@ -1474,10 +1474,10 @@ static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
{
	struct mlx5e_priv *priv = netdev_priv(netdev);
	struct mlx5_core_dev *mdev = priv->mdev;
	struct mlx5e_channels new_channels = {};
	bool rx_mode_changed;
	u8 rx_cq_period_mode;
	int err = 0;
	bool reset;

	rx_cq_period_mode = enable ?
		MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
@@ -1491,16 +1491,51 @@ static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
	if (!rx_mode_changed)
		return 0;

	reset = test_bit(MLX5E_STATE_OPENED, &priv->state);
	if (reset)
		mlx5e_close_locked(netdev);
	new_channels.params = priv->channels.params;
	mlx5e_set_rx_cq_mode_params(&new_channels.params, rx_cq_period_mode);

	if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
		priv->channels.params = new_channels.params;
		return 0;
	}

	err = mlx5e_open_channels(priv, &new_channels);
	if (err)
		return err;

	mlx5e_switch_priv_channels(priv, &new_channels);
	return 0;
}

int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
{
	bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
	struct mlx5e_channels new_channels = {};
	int err = 0;

	if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
		return new_val ? -EOPNOTSUPP : 0;

	if (curr_val == new_val)
		return 0;

	new_channels.params = priv->channels.params;
	MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);

	mlx5e_set_rx_cq_mode_params(&priv->channels.params, rx_cq_period_mode);
	mlx5e_set_rq_type_params(priv->mdev, &new_channels.params,
				 new_channels.params.rq_wq_type);

	if (reset)
		err = mlx5e_open_locked(netdev);
	if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
		priv->channels.params = new_channels.params;
		return 0;
	}

	err = mlx5e_open_channels(priv, &new_channels);
	if (err)
		return err;

	mlx5e_switch_priv_channels(priv, &new_channels);
	return 0;
}

static int set_pflag_rx_cqe_compress(struct net_device *netdev,
@@ -1519,8 +1554,6 @@ static int set_pflag_rx_cqe_compress(struct net_device *netdev,

	mlx5e_modify_rx_cqe_compression_locked(priv, enable);
	priv->channels.params.rx_cqe_compress_def = enable;
	mlx5e_set_rq_type_params(priv->mdev, &priv->channels.params,
				 priv->channels.params.rq_wq_type);

	return 0;
}
+0 −22
Original line number Diff line number Diff line
@@ -156,28 +156,6 @@ static inline u32 mlx5e_decompress_cqes_start(struct mlx5e_rq *rq,
	return mlx5e_decompress_cqes_cont(rq, cq, 1, budget_rem) - 1;
}

void mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool val)
{
	bool was_opened;

	if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
		return;

	if (MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS) == val)
		return;

	was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
	if (was_opened)
		mlx5e_close_locked(priv->netdev);

	MLX5E_SET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, val);
	mlx5e_set_rq_type_params(priv->mdev, &priv->channels.params,
				 priv->channels.params.rq_wq_type);

	if (was_opened)
		mlx5e_open_locked(priv->netdev);
}

#define RQ_PAGE_SIZE(rq) ((1 << rq->buff.page_order) << PAGE_SHIFT)

static inline bool mlx5e_rx_cache_put(struct mlx5e_rq *rq,