Loading fw/htt.h +94 −2 Original line number Diff line number Diff line Loading @@ -241,9 +241,11 @@ * 3.114 Add HTT_H2T_MSG_TYPE_UMAC_HANG_RECOVERY_SOC_START_PRE_RESET def. * 3.115 Add HTT_H2T_MSG_TYPE_RX_CCE_SUPER_RULE_SETUP and * HTT_T2H_MSG_TYPE_RX_CCE_SUPER_RULE_SETUP_DONE msg defs. * 3.116 Add HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE flag. * 3.117 Add HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_IND def. */ #define HTT_CURRENT_VERSION_MAJOR 3 #define HTT_CURRENT_VERSION_MINOR 115 #define HTT_CURRENT_VERSION_MINOR 117 #define HTT_NUM_TX_FRAG_DESC 1024 Loading Loading @@ -7141,7 +7143,8 @@ PREPACK struct htt_tx_monitor_cfg_t { filter_in_tx_msdu_end_mgmt: 1, filter_in_tx_msdu_end_ctrl: 1, filter_in_tx_msdu_end_data: 1, rsvd3: 17; word_mask_compaction_enable: 1, rsvd3: 16; A_UINT32 tlv_filter_mask_in0; A_UINT32 tlv_filter_mask_in1; A_UINT32 tlv_filter_mask_in2; Loading Loading @@ -7411,6 +7414,18 @@ PREPACK struct htt_tx_monitor_cfg_t { ((_var) |= ((_val) << HTT_TX_MONITOR_CFG_FILTER_IN_TX_MSDU_END_DATA_S)); \ } while (0) #define HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_M 0x00008000 #define HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_S 15 #define HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_GET(_var) \ (((_var) & HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_M) >> \ HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_S) #define HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE, _val); \ ((_var) |= ((_val) << HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_S)); \ } while (0) #define HTT_TX_MONITOR_CFG_TLV_FILTER_MASK_M 0xffffffff #define HTT_TX_MONITOR_CFG_TLV_FILTER_MASK_S 0 #define HTT_TX_MONITOR_CFG_TLV_FILTER_MASK_GET(_var) \ Loading Loading @@ -10538,6 +10553,7 @@ enum htt_t2h_msg_type { HTT_T2H_MSG_TYPE_RX_ADDBA_EXTN = 0x31, HTT_T2H_MSG_TYPE_RX_DELBA_EXTN = 0x32, HTT_T2H_MSG_TYPE_RX_CCE_SUPER_RULE_SETUP_DONE = 0x33, HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_IND = 0x34, HTT_T2H_MSG_TYPE_TEST, Loading Loading @@ -19900,5 +19916,81 @@ PREPACK struct htt_rx_cce_super_rule_setup_done_t { ((_var) |= ((_val) << HTT_RX_CCE_SUPER_RULE_SETUP_DONE_CFG_RESULT_1_S)); \ } while (0) /** * @brief target -> host CoDel MSDU queue latencies array configuration * * MSG_TYPE => HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_IND * * @details * The HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_IND message is used * by the target to inform the host of the location and size of the DDR array of * per MSDU queue latency metrics. This array is updated by the host and * read by the target. The target uses these metric values to determine * which MSDU queues have latencies exceeding their CoDel latency target. * * |31 16|15 8|7 0| * |-------------------------------------------+----------| * | number of array elements | reserved | MSG_TYPE | * |-------------------------------------------+----------| * | array physical address, low bits | * |------------------------------------------------------| * | array physical address, high bits | * |------------------------------------------------------| * Header fields: * - MSG_TYPE * Bits 7:0 * Purpose: Identifies this as a CoDel MSDU queue latencies * array configuration message. * Value: (HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_IND) * - NUM_ELEM * Bits 31:16 * Purpose: Inform the host of the length of the MSDU queue latencies array. * Value: Specifies the number of elements in the MSDU queue latency * metrics array. This value is the same as the maximum number of * MSDU queues supported by the target. * Since each array element is 16 bits, the size in bytes of the * MSDU queue latency metrics array is twice the number of elements. * - PADDR_LOW * Bits 31:0 * Purpose: Inform the host of the MSDU queue latencies array's location. * Value: Lower 32 bits of the physical address of the MSDU queue latency * metrics array. * - PADDR_HIGH * Bits 31:0 * Purpose: Inform the host of the MSDU queue latencies array's location. * Value: Upper 32 bits of the physical address of the MSDU queue latency * metrics array. */ typedef struct { A_UINT32 msg_type: 8, /* bits 7:0 */ reserved: 8, /* bits 15:8 */ num_elem: 16; /* bits 31:16 */ A_UINT32 paddr_low; A_UINT32 paddr_high; } htt_t2h_codel_msduq_latencies_array_cfg_int_t; #define HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_SIZE 12 /* bytes */ #define HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_M 0xffff0000 #define HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_S 16 #define HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_GET(_var) \ (((_var) & HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_M) >> \ HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_S) #define HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL( \ HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM, _val); \ ((_var) |= ((_val) << \ HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_S)); \ } while (0) /* * This CoDel MSDU queue latencies array whose location and number of * elements are specified by this HTT_T2H message consists of 16-bit elements * that each specify a statistical summary (min) of a MSDU queue's latency, * using microseconds units. */ #define HTT_CODEL_MSDUQ_LATENCIES_ARRAY_ELEM_BYTES 2 #endif fw/htt_ppdu_stats.h +18 −2 Original line number Diff line number Diff line /* * Copyright (c) 2017-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the Loading Loading @@ -1796,6 +1796,19 @@ typedef enum HTT_PPDU_STATS_RESP_PPDU_TYPE HTT_PPDU_STATS_RESP_PPDU_TYPE; ((_var) |= ((_val) << HTT_PPDU_STATS_USER_RATE_TLV_PUNC_PATTERN_BITMAP_S)); \ } while (0) #define HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_M 0x00010000 #define HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_S 16 #define HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_GET(_var) \ (((_var) & HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_M) >> \ HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_S) #define HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_SET (_var , _val) \ do { \ HTT_CHECK_SET_VAL(HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF, _val); \ ((_var) |= ((_val) << HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_S)); \ } while (0) typedef enum HTT_PPDU_STATS_RU_SIZE { HTT_PPDU_STATS_RU_26, HTT_PPDU_STATS_RU_52, Loading Loading @@ -1981,9 +1994,12 @@ typedef struct { /* * BIT [15:0] :- Punctured BW bitmap pattern to indicate which BWs are * punctured. * BIT 16 :- flag showing whether EHT extra LTF is applied * for current PPDU */ A_UINT32 punc_pattern_bitmap: 16, reserved4: 16; extra_eht_ltf: 1, reserved4: 15; } htt_ppdu_stats_user_rate_tlv; #define HTT_PPDU_STATS_USR_RATE_VALID_M 0x80000000 Loading fw/htt_stats.h +18 −5 Original line number Diff line number Diff line /* * Copyright (c) 2017-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the Loading Loading @@ -1481,6 +1481,17 @@ typedef struct _htt_tx_tid_stats_v1_tlv { A_UINT32 mlo_flush_partner_info_high; A_UINT32 mlo_flush_initator_info_low; A_UINT32 mlo_flush_initator_info_high; /* * head_msdu_tqm_timestamp_us: * MSDU enqueue timestamp (TQM reference timestamp) for the MSDU * at the head of the MPDU queue * head_msdu_tqm_latency_us: * The age of the MSDU that is at the head of the MPDU queue, * i.e. the delta between the current TQM time and the MSDU's * enqueue timestamp. */ A_UINT32 head_msdu_tqm_timestamp_us; A_UINT32 head_msdu_tqm_latency_us; } htt_tx_tid_stats_v1_tlv; #define HTT_RX_TID_STATS_SW_PEER_ID_M 0x0000ffff Loading Loading @@ -4980,6 +4991,8 @@ typedef struct { A_UINT32 ax_su_embedded_trigger_data_ppdu_err; /** sta side trigger stats */ A_UINT32 trigger_type_11be[HTT_TX_PDEV_STATS_NUM_11BE_TRIGGER_TYPES]; /** Stats for Extra EHT LTF */ A_UINT32 extra_eht_ltf; } htt_tx_pdev_rate_stats_tlv; typedef struct { Loading Loading @@ -7494,13 +7507,13 @@ typedef struct { /** rx_pkt_cnt - * Received EOP (end-of-packet) count per packet type; * [0] = 11a; [1] = 11b; [2] = 11n; [3] = 11ac; [4] = 11ax; [5] = GF * [6-7]=RSVD * [6] = EHT; [7]=RSVD; [6] = Applicable only for BE */ A_UINT32 rx_pkt_cnt[HTT_MAX_RX_PKT_CNT]; /** rx_pkt_crc_pass_cnt - * Received EOP (end-of-packet) count per packet type; * [0] = 11a; [1] = 11b; [2] = 11n; [3] = 11ac; [4] = 11ax; [5] = GF * [6-7]=RSVD * [6] = EHT; [7]=RSVD; [6] = Applicable only for BE */ A_UINT32 rx_pkt_crc_pass_cnt[HTT_MAX_RX_PKT_CRC_PASS_CNT]; /** per_blk_err_cnt - Loading @@ -7522,12 +7535,12 @@ typedef struct { A_UINT32 rx_ota_err_cnt[HTT_MAX_RX_OTA_ERR_CNT]; /** rx_pkt_cnt_ext - * Received EOP (end-of-packet) count per packet type for BE; * [0] = EHT; [1] = WUR; [2] = AZ; [3]=RVSD * [0] = WUR; [1] = AZ; [2-3]=RVSD */ A_UINT32 rx_pkt_cnt_ext[HTT_MAX_RX_PKT_CNT_EXT]; /** rx_pkt_crc_pass_cnt_ext - * Received EOP (end-of-packet) count per packet type for BE; * [0] = EHT; [1] = WUR; [2] = AZ; [3]=RVSD * [0] = WUR; [1] = AZ; [2-3]=RVSD */ A_UINT32 rx_pkt_crc_pass_cnt_ext[HTT_MAX_RX_PKT_CRC_PASS_CNT_EXT]; /** rx_pkt_mu_cnt - Loading fw/wlan_defs.h +7 −4 Original line number Diff line number Diff line /* * Copyright (c) 2013-2016, 2018-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * Loading Loading @@ -458,6 +458,10 @@ typedef struct { A_UINT32 low_5ghz_chan; A_UINT32 high_5ghz_chan; A_UINT32 wireless_modes_ext; /* REGDMN MODE ext */ A_UINT32 low_2ghz_chan_ext; A_UINT32 high_2ghz_chan_ext; A_UINT32 low_5ghz_chan_ext; A_UINT32 high_5ghz_chan_ext; } HAL_REG_CAPABILITIES; #ifdef NUM_SPATIAL_STREAM Loading Loading @@ -972,7 +976,6 @@ struct wlan_dbg_mem_stats { }; struct wlan_dbg_peer_stats { A_INT32 dummy; /* REMOVE THIS ONCE REAL PEER STAT COUNTERS ARE ADDED */ }; Loading fw/wmi_tlv_defs.h +30 −2 Original line number Diff line number Diff line Loading @@ -1336,6 +1336,12 @@ typedef enum { WMITLV_TAG_STRUC_wmi_tdma_schedule_request_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_hpa_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_hpa_evt_fixed_param, WMITLV_TAG_STRUC_wmi_pdev_set_tgtr2p_table_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_pdev_set_tgtr2p_table_event_fixed_param, WMITLV_TAG_STRUC_wmi_peer_bulk_set_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_peer_preferred_link_map, WMITLV_TAG_STRUC_wmi_scan_blanking_params_info, WMITLV_TAG_STRUC_wmi_peer_list, } WMITLV_TAG_ID; /* Loading Loading @@ -1854,6 +1860,8 @@ typedef enum { OP(WMI_ESL_EGID_CMDID) \ OP(WMI_TDMA_SCHEDULE_REQUEST_CMDID) \ OP(WMI_HPA_CMDID) \ OP(WMI_PDEV_SET_TGTR2P_TABLE_CMDID) \ OP(WMI_PEER_BULK_SET_CMDID) \ /* add new CMD_LIST elements above this line */ Loading Loading @@ -2153,6 +2161,7 @@ typedef enum { OP(WMI_MLO_AP_VDEV_TID_TO_LINK_MAP_EVENTID) \ OP(WMI_TAS_POWER_HISTORY_EVENTID) \ OP(WMI_HPA_EVENTID) \ OP(WMI_PDEV_SET_TGTR2P_TABLE_EVENTID) \ /* add new EVT_LIST elements above this line */ Loading Loading @@ -4796,6 +4805,12 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PEER_CFR_CAPTURE_CMDID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_chan_width_peer_list, peer_info, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_PEER_CHAN_WIDTH_SWITCH_CMDID); /* BULK Peer Set command */ #define WMITLV_TABLE_WMI_PEER_BULK_SET_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_bulk_set_cmd_fixed_param, wmi_peer_bulk_set_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_list, peer_info, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_PEER_BULK_SET_CMDID); /* OBSS_PD Spatial_Reuse Set Default OBSS Thresholds */ #define WMITLV_TABLE_WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_obss_spatial_reuse_set_def_obss_thresh_cmd_fixed_param, wmi_obss_spatial_reuse_set_def_obss_thresh_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) Loading Loading @@ -5065,7 +5080,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_MLO_TEARDOWN_CMDID); /** WMI cmd used to setup Tid to Link Mapping for a MLO Peer */ #define WMITLV_TABLE_WMI_MLO_PEER_TID_TO_LINK_MAP_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_tid_to_link_map_fixed_param, wmi_peer_tid_to_link_map_fixed_param, fixed_param, WMITLV_SIZE_FIX) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_tid_to_link_map, tid_to_link_map, WMITLV_SIZE_VAR) WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_tid_to_link_map, tid_to_link_map, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_preferred_link_map, peer_preferred_link_map, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_MLO_PEER_TID_TO_LINK_MAP_CMDID); /** WMI cmd used to setup Tid to Link Mapping for a vdev */ Loading Loading @@ -5270,6 +5286,12 @@ WMITLV_CREATE_PARAM_STRUC(WMI_TDMA_SCHEDULE_REQUEST_CMDID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, data, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_HPA_CMDID); /* WMI cmd to set target rate to power table */ #define WMITLV_TABLE_WMI_PDEV_SET_TGTR2P_TABLE_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_tgtr2p_table_cmd_fixed_param, wmi_pdev_set_tgtr2p_table_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_INT8, r2p_array, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_TGTR2P_TABLE_CMDID); /************************** TLV definitions of WMI events *******************************/ Loading Loading @@ -5450,7 +5472,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_GET_TX_POWER_EVENTID); /* Channel Info Event */ #define WMITLV_TABLE_WMI_CHAN_INFO_EVENTID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_chan_info_event_fixed_param, wmi_chan_info_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_chan_info_event_fixed_param, wmi_chan_info_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_scan_blanking_params_info, scan_blanking_params, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_CHAN_INFO_EVENTID); /* RSSI dB to dBm conversion params info event to host */ Loading Loading @@ -7147,6 +7170,11 @@ WMITLV_CREATE_PARAM_STRUC(WMI_MLO_AP_VDEV_TID_TO_LINK_MAP_EVENTID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_hpa_evt_fixed_param, wmi_hpa_evt_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_HPA_EVENTID); /* WMI target rate to power table return status event */ #define WMITLV_TABLE_WMI_PDEV_SET_TGTR2P_TABLE_EVENTID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_tgtr2p_table_event_fixed_param, wmi_pdev_set_tgtr2p_table_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_TGTR2P_TABLE_EVENTID); #ifdef __cplusplus Loading Loading
fw/htt.h +94 −2 Original line number Diff line number Diff line Loading @@ -241,9 +241,11 @@ * 3.114 Add HTT_H2T_MSG_TYPE_UMAC_HANG_RECOVERY_SOC_START_PRE_RESET def. * 3.115 Add HTT_H2T_MSG_TYPE_RX_CCE_SUPER_RULE_SETUP and * HTT_T2H_MSG_TYPE_RX_CCE_SUPER_RULE_SETUP_DONE msg defs. * 3.116 Add HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE flag. * 3.117 Add HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_IND def. */ #define HTT_CURRENT_VERSION_MAJOR 3 #define HTT_CURRENT_VERSION_MINOR 115 #define HTT_CURRENT_VERSION_MINOR 117 #define HTT_NUM_TX_FRAG_DESC 1024 Loading Loading @@ -7141,7 +7143,8 @@ PREPACK struct htt_tx_monitor_cfg_t { filter_in_tx_msdu_end_mgmt: 1, filter_in_tx_msdu_end_ctrl: 1, filter_in_tx_msdu_end_data: 1, rsvd3: 17; word_mask_compaction_enable: 1, rsvd3: 16; A_UINT32 tlv_filter_mask_in0; A_UINT32 tlv_filter_mask_in1; A_UINT32 tlv_filter_mask_in2; Loading Loading @@ -7411,6 +7414,18 @@ PREPACK struct htt_tx_monitor_cfg_t { ((_var) |= ((_val) << HTT_TX_MONITOR_CFG_FILTER_IN_TX_MSDU_END_DATA_S)); \ } while (0) #define HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_M 0x00008000 #define HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_S 15 #define HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_GET(_var) \ (((_var) & HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_M) >> \ HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_S) #define HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE, _val); \ ((_var) |= ((_val) << HTT_TX_MONITOR_CFG_WORD_MASK_COMPACTION_ENABLE_S)); \ } while (0) #define HTT_TX_MONITOR_CFG_TLV_FILTER_MASK_M 0xffffffff #define HTT_TX_MONITOR_CFG_TLV_FILTER_MASK_S 0 #define HTT_TX_MONITOR_CFG_TLV_FILTER_MASK_GET(_var) \ Loading Loading @@ -10538,6 +10553,7 @@ enum htt_t2h_msg_type { HTT_T2H_MSG_TYPE_RX_ADDBA_EXTN = 0x31, HTT_T2H_MSG_TYPE_RX_DELBA_EXTN = 0x32, HTT_T2H_MSG_TYPE_RX_CCE_SUPER_RULE_SETUP_DONE = 0x33, HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_IND = 0x34, HTT_T2H_MSG_TYPE_TEST, Loading Loading @@ -19900,5 +19916,81 @@ PREPACK struct htt_rx_cce_super_rule_setup_done_t { ((_var) |= ((_val) << HTT_RX_CCE_SUPER_RULE_SETUP_DONE_CFG_RESULT_1_S)); \ } while (0) /** * @brief target -> host CoDel MSDU queue latencies array configuration * * MSG_TYPE => HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_IND * * @details * The HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_IND message is used * by the target to inform the host of the location and size of the DDR array of * per MSDU queue latency metrics. This array is updated by the host and * read by the target. The target uses these metric values to determine * which MSDU queues have latencies exceeding their CoDel latency target. * * |31 16|15 8|7 0| * |-------------------------------------------+----------| * | number of array elements | reserved | MSG_TYPE | * |-------------------------------------------+----------| * | array physical address, low bits | * |------------------------------------------------------| * | array physical address, high bits | * |------------------------------------------------------| * Header fields: * - MSG_TYPE * Bits 7:0 * Purpose: Identifies this as a CoDel MSDU queue latencies * array configuration message. * Value: (HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_IND) * - NUM_ELEM * Bits 31:16 * Purpose: Inform the host of the length of the MSDU queue latencies array. * Value: Specifies the number of elements in the MSDU queue latency * metrics array. This value is the same as the maximum number of * MSDU queues supported by the target. * Since each array element is 16 bits, the size in bytes of the * MSDU queue latency metrics array is twice the number of elements. * - PADDR_LOW * Bits 31:0 * Purpose: Inform the host of the MSDU queue latencies array's location. * Value: Lower 32 bits of the physical address of the MSDU queue latency * metrics array. * - PADDR_HIGH * Bits 31:0 * Purpose: Inform the host of the MSDU queue latencies array's location. * Value: Upper 32 bits of the physical address of the MSDU queue latency * metrics array. */ typedef struct { A_UINT32 msg_type: 8, /* bits 7:0 */ reserved: 8, /* bits 15:8 */ num_elem: 16; /* bits 31:16 */ A_UINT32 paddr_low; A_UINT32 paddr_high; } htt_t2h_codel_msduq_latencies_array_cfg_int_t; #define HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_SIZE 12 /* bytes */ #define HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_M 0xffff0000 #define HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_S 16 #define HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_GET(_var) \ (((_var) & HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_M) >> \ HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_S) #define HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL( \ HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM, _val); \ ((_var) |= ((_val) << \ HTT_T2H_CODEL_MSDUQ_LATENCIES_ARRAY_CFG_INT_NUM_ELEM_S)); \ } while (0) /* * This CoDel MSDU queue latencies array whose location and number of * elements are specified by this HTT_T2H message consists of 16-bit elements * that each specify a statistical summary (min) of a MSDU queue's latency, * using microseconds units. */ #define HTT_CODEL_MSDUQ_LATENCIES_ARRAY_ELEM_BYTES 2 #endif
fw/htt_ppdu_stats.h +18 −2 Original line number Diff line number Diff line /* * Copyright (c) 2017-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the Loading Loading @@ -1796,6 +1796,19 @@ typedef enum HTT_PPDU_STATS_RESP_PPDU_TYPE HTT_PPDU_STATS_RESP_PPDU_TYPE; ((_var) |= ((_val) << HTT_PPDU_STATS_USER_RATE_TLV_PUNC_PATTERN_BITMAP_S)); \ } while (0) #define HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_M 0x00010000 #define HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_S 16 #define HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_GET(_var) \ (((_var) & HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_M) >> \ HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_S) #define HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_SET (_var , _val) \ do { \ HTT_CHECK_SET_VAL(HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF, _val); \ ((_var) |= ((_val) << HTT_PPDU_STATS_USER_RATE_TLV_EXTRA_EHT_LTF_S)); \ } while (0) typedef enum HTT_PPDU_STATS_RU_SIZE { HTT_PPDU_STATS_RU_26, HTT_PPDU_STATS_RU_52, Loading Loading @@ -1981,9 +1994,12 @@ typedef struct { /* * BIT [15:0] :- Punctured BW bitmap pattern to indicate which BWs are * punctured. * BIT 16 :- flag showing whether EHT extra LTF is applied * for current PPDU */ A_UINT32 punc_pattern_bitmap: 16, reserved4: 16; extra_eht_ltf: 1, reserved4: 15; } htt_ppdu_stats_user_rate_tlv; #define HTT_PPDU_STATS_USR_RATE_VALID_M 0x80000000 Loading
fw/htt_stats.h +18 −5 Original line number Diff line number Diff line /* * Copyright (c) 2017-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the Loading Loading @@ -1481,6 +1481,17 @@ typedef struct _htt_tx_tid_stats_v1_tlv { A_UINT32 mlo_flush_partner_info_high; A_UINT32 mlo_flush_initator_info_low; A_UINT32 mlo_flush_initator_info_high; /* * head_msdu_tqm_timestamp_us: * MSDU enqueue timestamp (TQM reference timestamp) for the MSDU * at the head of the MPDU queue * head_msdu_tqm_latency_us: * The age of the MSDU that is at the head of the MPDU queue, * i.e. the delta between the current TQM time and the MSDU's * enqueue timestamp. */ A_UINT32 head_msdu_tqm_timestamp_us; A_UINT32 head_msdu_tqm_latency_us; } htt_tx_tid_stats_v1_tlv; #define HTT_RX_TID_STATS_SW_PEER_ID_M 0x0000ffff Loading Loading @@ -4980,6 +4991,8 @@ typedef struct { A_UINT32 ax_su_embedded_trigger_data_ppdu_err; /** sta side trigger stats */ A_UINT32 trigger_type_11be[HTT_TX_PDEV_STATS_NUM_11BE_TRIGGER_TYPES]; /** Stats for Extra EHT LTF */ A_UINT32 extra_eht_ltf; } htt_tx_pdev_rate_stats_tlv; typedef struct { Loading Loading @@ -7494,13 +7507,13 @@ typedef struct { /** rx_pkt_cnt - * Received EOP (end-of-packet) count per packet type; * [0] = 11a; [1] = 11b; [2] = 11n; [3] = 11ac; [4] = 11ax; [5] = GF * [6-7]=RSVD * [6] = EHT; [7]=RSVD; [6] = Applicable only for BE */ A_UINT32 rx_pkt_cnt[HTT_MAX_RX_PKT_CNT]; /** rx_pkt_crc_pass_cnt - * Received EOP (end-of-packet) count per packet type; * [0] = 11a; [1] = 11b; [2] = 11n; [3] = 11ac; [4] = 11ax; [5] = GF * [6-7]=RSVD * [6] = EHT; [7]=RSVD; [6] = Applicable only for BE */ A_UINT32 rx_pkt_crc_pass_cnt[HTT_MAX_RX_PKT_CRC_PASS_CNT]; /** per_blk_err_cnt - Loading @@ -7522,12 +7535,12 @@ typedef struct { A_UINT32 rx_ota_err_cnt[HTT_MAX_RX_OTA_ERR_CNT]; /** rx_pkt_cnt_ext - * Received EOP (end-of-packet) count per packet type for BE; * [0] = EHT; [1] = WUR; [2] = AZ; [3]=RVSD * [0] = WUR; [1] = AZ; [2-3]=RVSD */ A_UINT32 rx_pkt_cnt_ext[HTT_MAX_RX_PKT_CNT_EXT]; /** rx_pkt_crc_pass_cnt_ext - * Received EOP (end-of-packet) count per packet type for BE; * [0] = EHT; [1] = WUR; [2] = AZ; [3]=RVSD * [0] = WUR; [1] = AZ; [2-3]=RVSD */ A_UINT32 rx_pkt_crc_pass_cnt_ext[HTT_MAX_RX_PKT_CRC_PASS_CNT_EXT]; /** rx_pkt_mu_cnt - Loading
fw/wlan_defs.h +7 −4 Original line number Diff line number Diff line /* * Copyright (c) 2013-2016, 2018-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * Loading Loading @@ -458,6 +458,10 @@ typedef struct { A_UINT32 low_5ghz_chan; A_UINT32 high_5ghz_chan; A_UINT32 wireless_modes_ext; /* REGDMN MODE ext */ A_UINT32 low_2ghz_chan_ext; A_UINT32 high_2ghz_chan_ext; A_UINT32 low_5ghz_chan_ext; A_UINT32 high_5ghz_chan_ext; } HAL_REG_CAPABILITIES; #ifdef NUM_SPATIAL_STREAM Loading Loading @@ -972,7 +976,6 @@ struct wlan_dbg_mem_stats { }; struct wlan_dbg_peer_stats { A_INT32 dummy; /* REMOVE THIS ONCE REAL PEER STAT COUNTERS ARE ADDED */ }; Loading
fw/wmi_tlv_defs.h +30 −2 Original line number Diff line number Diff line Loading @@ -1336,6 +1336,12 @@ typedef enum { WMITLV_TAG_STRUC_wmi_tdma_schedule_request_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_hpa_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_hpa_evt_fixed_param, WMITLV_TAG_STRUC_wmi_pdev_set_tgtr2p_table_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_pdev_set_tgtr2p_table_event_fixed_param, WMITLV_TAG_STRUC_wmi_peer_bulk_set_cmd_fixed_param, WMITLV_TAG_STRUC_wmi_peer_preferred_link_map, WMITLV_TAG_STRUC_wmi_scan_blanking_params_info, WMITLV_TAG_STRUC_wmi_peer_list, } WMITLV_TAG_ID; /* Loading Loading @@ -1854,6 +1860,8 @@ typedef enum { OP(WMI_ESL_EGID_CMDID) \ OP(WMI_TDMA_SCHEDULE_REQUEST_CMDID) \ OP(WMI_HPA_CMDID) \ OP(WMI_PDEV_SET_TGTR2P_TABLE_CMDID) \ OP(WMI_PEER_BULK_SET_CMDID) \ /* add new CMD_LIST elements above this line */ Loading Loading @@ -2153,6 +2161,7 @@ typedef enum { OP(WMI_MLO_AP_VDEV_TID_TO_LINK_MAP_EVENTID) \ OP(WMI_TAS_POWER_HISTORY_EVENTID) \ OP(WMI_HPA_EVENTID) \ OP(WMI_PDEV_SET_TGTR2P_TABLE_EVENTID) \ /* add new EVT_LIST elements above this line */ Loading Loading @@ -4796,6 +4805,12 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PEER_CFR_CAPTURE_CMDID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_chan_width_peer_list, peer_info, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_PEER_CHAN_WIDTH_SWITCH_CMDID); /* BULK Peer Set command */ #define WMITLV_TABLE_WMI_PEER_BULK_SET_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_bulk_set_cmd_fixed_param, wmi_peer_bulk_set_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_list, peer_info, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_PEER_BULK_SET_CMDID); /* OBSS_PD Spatial_Reuse Set Default OBSS Thresholds */ #define WMITLV_TABLE_WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_obss_spatial_reuse_set_def_obss_thresh_cmd_fixed_param, wmi_obss_spatial_reuse_set_def_obss_thresh_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) Loading Loading @@ -5065,7 +5080,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_MLO_TEARDOWN_CMDID); /** WMI cmd used to setup Tid to Link Mapping for a MLO Peer */ #define WMITLV_TABLE_WMI_MLO_PEER_TID_TO_LINK_MAP_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_peer_tid_to_link_map_fixed_param, wmi_peer_tid_to_link_map_fixed_param, fixed_param, WMITLV_SIZE_FIX) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_tid_to_link_map, tid_to_link_map, WMITLV_SIZE_VAR) WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_tid_to_link_map, tid_to_link_map, WMITLV_SIZE_VAR) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_peer_preferred_link_map, peer_preferred_link_map, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_MLO_PEER_TID_TO_LINK_MAP_CMDID); /** WMI cmd used to setup Tid to Link Mapping for a vdev */ Loading Loading @@ -5270,6 +5286,12 @@ WMITLV_CREATE_PARAM_STRUC(WMI_TDMA_SCHEDULE_REQUEST_CMDID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_UINT32, A_UINT32, data, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_HPA_CMDID); /* WMI cmd to set target rate to power table */ #define WMITLV_TABLE_WMI_PDEV_SET_TGTR2P_TABLE_CMDID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_tgtr2p_table_cmd_fixed_param, wmi_pdev_set_tgtr2p_table_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_INT8, r2p_array, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_TGTR2P_TABLE_CMDID); /************************** TLV definitions of WMI events *******************************/ Loading Loading @@ -5450,7 +5472,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_VDEV_GET_TX_POWER_EVENTID); /* Channel Info Event */ #define WMITLV_TABLE_WMI_CHAN_INFO_EVENTID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_chan_info_event_fixed_param, wmi_chan_info_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_chan_info_event_fixed_param, wmi_chan_info_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_scan_blanking_params_info, scan_blanking_params, WMITLV_SIZE_VAR) WMITLV_CREATE_PARAM_STRUC(WMI_CHAN_INFO_EVENTID); /* RSSI dB to dBm conversion params info event to host */ Loading Loading @@ -7147,6 +7170,11 @@ WMITLV_CREATE_PARAM_STRUC(WMI_MLO_AP_VDEV_TID_TO_LINK_MAP_EVENTID); WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_hpa_evt_fixed_param, wmi_hpa_evt_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_HPA_EVENTID); /* WMI target rate to power table return status event */ #define WMITLV_TABLE_WMI_PDEV_SET_TGTR2P_TABLE_EVENTID(id,op,buf,len) \ WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_pdev_set_tgtr2p_table_event_fixed_param, wmi_pdev_set_tgtr2p_table_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) WMITLV_CREATE_PARAM_STRUC(WMI_PDEV_SET_TGTR2P_TABLE_EVENTID); #ifdef __cplusplus Loading