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Commit bdbe58e6 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2016-02-12' of git://anongit.freedesktop.org/drm-intel into drm-fixes 

i915 display fixes mostly.

* tag 'drm-intel-fixes-2016-02-12' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: fix error path in intel_setup_gmbus()
  drm/i915/skl: Fix typo in DPLL_CFGCR1 definition
  drm/i915/skl: Don't skip mst encoders in skl_ddi_pll_select()
  drm/i915: Pretend cursor is always on for ILK-style WM calculations (v2)
  drm/i915/dp: reduce missing TPS3 support errors to debug logging
  drm/i915/dp: abstract training pattern selection
  drm/i915/dsi: skip gpio element execution when not supported
  drm/i915/dsi: don't pass arbitrary data to sideband
  drm/i915/dsi: defend gpio table against out of bounds access
  drm/i915/bxt: Don't save/restore eDP panel power during suspend (v3)
  drm/i915: Allow i915_gem_object_get_page() on userptr as well
parents c92a428f ed3f9fd1

drivers/gpu/drm/i915/i915_drv.h

+4 −0
Original line number Diff line number Diff line
@@ -1988,6 +1988,9 @@ enum hdmi_force_audio { 
#define I915_GTT_OFFSET_NONE ((u32)-1)



struct drm_i915_gem_object_ops {

	unsigned int flags;

#define I915_GEM_OBJECT_HAS_STRUCT_PAGE 0x1



	/* Interface between the GEM object and its backing storage.

	 * get_pages() is called once prior to the use of the associated set

	 * of pages before to binding them into the GTT, and put_pages() is
@@ -2003,6 +2006,7 @@ struct drm_i915_gem_object_ops { 
	 */

	int (*get_pages)(struct drm_i915_gem_object *);

	void (*put_pages)(struct drm_i915_gem_object *);



	int (*dmabuf_export)(struct drm_i915_gem_object *);

	void (*release)(struct drm_i915_gem_object *);

};

drivers/gpu/drm/i915/i915_gem.c

+2 −1
Original line number Diff line number Diff line
@@ -4425,6 +4425,7 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj, 
}



static const struct drm_i915_gem_object_ops i915_gem_object_ops = {

	.flags = I915_GEM_OBJECT_HAS_STRUCT_PAGE,

	.get_pages = i915_gem_object_get_pages_gtt,

	.put_pages = i915_gem_object_put_pages_gtt,

};
@@ -5261,7 +5262,7 @@ i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj, int n) 
	struct page *page;



	/* Only default objects have per-page dirty tracking */

	if (WARN_ON(obj->ops != &i915_gem_object_ops))

	if (WARN_ON((obj->ops->flags & I915_GEM_OBJECT_HAS_STRUCT_PAGE) == 0))

		return NULL;



	page = i915_gem_object_get_page(obj, n);

drivers/gpu/drm/i915/i915_gem_userptr.c

+2 −1
Original line number Diff line number Diff line
@@ -789,9 +789,10 @@ i915_gem_userptr_dmabuf_export(struct drm_i915_gem_object *obj) 
}



static const struct drm_i915_gem_object_ops i915_gem_userptr_ops = {

	.dmabuf_export = i915_gem_userptr_dmabuf_export,

	.flags = I915_GEM_OBJECT_HAS_STRUCT_PAGE,

	.get_pages = i915_gem_userptr_get_pages,

	.put_pages = i915_gem_userptr_put_pages,

	.dmabuf_export = i915_gem_userptr_dmabuf_export,

	.release = i915_gem_userptr_release,

};

drivers/gpu/drm/i915/i915_reg.h

+1 −1
Original line number Diff line number Diff line
@@ -7514,7 +7514,7 @@ enum skl_disp_power_wells { 
#define  DPLL_CFGCR2_PDIV_7 (4<<2)

#define  DPLL_CFGCR2_CENTRAL_FREQ_MASK	(3)



#define DPLL_CFGCR1(id)	_MMIO_PIPE((id) - SKL_DPLL1, _DPLL1_CFGCR1, _DPLL2_CFGCR2)

#define DPLL_CFGCR1(id)	_MMIO_PIPE((id) - SKL_DPLL1, _DPLL1_CFGCR1, _DPLL2_CFGCR1)

#define DPLL_CFGCR2(id)	_MMIO_PIPE((id) - SKL_DPLL1, _DPLL1_CFGCR2, _DPLL2_CFGCR2)



/* BXT display engine PLL */

drivers/gpu/drm/i915/i915_suspend.c

+2 −2
Original line number Diff line number Diff line
@@ -49,7 +49,7 @@ static void i915_save_display(struct drm_device *dev) 
		dev_priv->regfile.savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS);

		dev_priv->regfile.savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS);

		dev_priv->regfile.savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR);

	} else if (!IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev)) {

	} else if (INTEL_INFO(dev)->gen <= 4) {

		dev_priv->regfile.savePP_CONTROL = I915_READ(PP_CONTROL);

		dev_priv->regfile.savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS);

		dev_priv->regfile.savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);
@@ -84,7 +84,7 @@ static void i915_restore_display(struct drm_device *dev) 
		I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->regfile.savePP_OFF_DELAYS);

		I915_WRITE(PCH_PP_DIVISOR, dev_priv->regfile.savePP_DIVISOR);

		I915_WRITE(PCH_PP_CONTROL, dev_priv->regfile.savePP_CONTROL);

	} else if (!IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev)) {

	} else if (INTEL_INFO(dev)->gen <= 4) {

		I915_WRITE(PP_ON_DELAYS, dev_priv->regfile.savePP_ON_DELAYS);

		I915_WRITE(PP_OFF_DELAYS, dev_priv->regfile.savePP_OFF_DELAYS);

		I915_WRITE(PP_DIVISOR, dev_priv->regfile.savePP_DIVISOR);