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Commit bdb18d93 authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge branch 'ingenic' into devel

parents 7f0ff06c e25f2af6

Documentation/devicetree/bindings/gpio/ingenic,gpio.txt

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Ingenic jz47xx GPIO controller



That the Ingenic GPIO driver node must be a sub-node of the Ingenic pinctrl

driver node.



Required properties:

--------------------



 - compatible: Must contain one of:

    - "ingenic,jz4740-gpio"

    - "ingenic,jz4770-gpio"

    - "ingenic,jz4780-gpio"

 - reg: The GPIO bank number.

 - interrupt-controller: Marks the device node as an interrupt controller.

 - interrupts: Interrupt specifier for the controllers interrupt.

 - #interrupt-cells: Should be 2. Refer to

   ../interrupt-controller/interrupts.txt for more details.

 - gpio-controller: Marks the device node as a GPIO controller.

 - #gpio-cells: Should be 2. The first cell is the GPIO number and the second

    cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the

    GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.

 - gpio-ranges: Range of pins managed by the GPIO controller. Refer to

   'gpio.txt' in this directory for more details.



Example:

--------



&pinctrl {

	#address-cells = <1>;

	#size-cells = <0>;



	gpa: gpio@0 {

		compatible = "ingenic,jz4740-gpio";

		reg = <0>;



		gpio-controller;

		gpio-ranges = <&pinctrl 0 0 32>;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;



		interrupt-parent = <&intc>;

		interrupts = <28>;

	};

};

Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt

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Ingenic jz47xx pin controller



Please refer to pinctrl-bindings.txt in this directory for details of the

common pinctrl bindings used by client devices, including the meaning of the

phrase "pin configuration node".



For the jz47xx SoCs, pin control is tightly bound with GPIO ports. All pins may

be used as GPIOs, multiplexed device functions are configured within the

GPIO port configuration registers and it is typical to refer to pins using the

naming scheme "PxN" where x is a character identifying the GPIO port with

which the pin is associated and N is an integer from 0 to 31 identifying the

pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and

PB31 is the last pin in GPIO port B. The jz4740 contains 4 GPIO ports, PA to

PD, for a total of 128 pins. The jz4780 contains 6 GPIO ports, PA to PF, for a

total of 192 pins.





Required properties:

--------------------



 - compatible: One of:

    - "ingenic,jz4740-pinctrl"

    - "ingenic,jz4770-pinctrl"

    - "ingenic,jz4780-pinctrl"

 - reg: Address range of the pinctrl registers.





GPIO sub-nodes

--------------



The pinctrl node can have optional sub-nodes for the Ingenic GPIO driver;

please refer to ../gpio/ingenic,gpio.txt.





Example:

--------



pinctrl: pin-controller@10010000 {

	compatible = "ingenic,jz4740-pinctrl";

	reg = <0x10010000 0x400>;

};

arch/mips/Kconfig

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@@ -364,6 +364,7 @@ config MACH_INGENIC 
	select SYS_SUPPORTS_ZBOOT_UART16550

	select DMA_NONCOHERENT

	select IRQ_MIPS_CPU

	select PINCTRL

	select GPIOLIB

	select COMMON_CLK

	select GENERIC_IRQ_CHIP

arch/mips/boot/dts/ingenic/ci20.dts

+60 −0
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@@ -29,18 +29,30 @@ 


&uart0 {

	status = "okay";



	pinctrl-names = "default";

	pinctrl-0 = <&pins_uart0>;

};



&uart1 {

	status = "okay";



	pinctrl-names = "default";

	pinctrl-0 = <&pins_uart1>;

};



&uart3 {

	status = "okay";



	pinctrl-names = "default";

	pinctrl-0 = <&pins_uart2>;

};



&uart4 {

	status = "okay";



	pinctrl-names = "default";

	pinctrl-0 = <&pins_uart4>;

};



&nemc {
@@ -61,6 +73,13 @@ 
		ingenic,nemc-tAW = <15>;

		ingenic,nemc-tSTRV = <100>;



		/*

		 * Only CLE/ALE are needed for the devices that are connected, rather

		 * than the full address line set.

		 */

		pinctrl-names = "default";

		pinctrl-0 = <&pins_nemc>;



		nand@1 {

			reg = <1>;
@@ -69,6 +88,9 @@ 
			nand-ecc-mode = "hw";

			nand-on-flash-bbt;



			pinctrl-names = "default";

			pinctrl-0 = <&pins_nemc_cs1>;



			partitions {

				compatible = "fixed-partitions";

				#address-cells = <2>;
@@ -106,3 +128,41 @@ 
&bch {

	status = "okay";

};



&pinctrl {

	pins_uart0: uart0 {

		function = "uart0";

		groups = "uart0-data";

		bias-disable;

	};



	pins_uart1: uart1 {

		function = "uart1";

		groups = "uart1-data";

		bias-disable;

	};



	pins_uart2: uart2 {

		function = "uart2";

		groups = "uart2-data", "uart2-hwflow";

		bias-disable;

	};



	pins_uart4: uart4 {

		function = "uart4";

		groups = "uart4-data";

		bias-disable;

	};



	pins_nemc: nemc {

		function = "nemc";

		groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";

		bias-disable;

	};



	pins_nemc_cs1: nemc-cs1 {

		function = "nemc-cs1";

		groups = "nemc-cs1";

		bias-disable;

	};

};

arch/mips/boot/dts/ingenic/jz4740.dtsi

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@@ -55,6 +55,74 @@ 
		clock-names = "rtc";

	};



	pinctrl: pin-controller@10010000 {

		compatible = "ingenic,jz4740-pinctrl";

		reg = <0x10010000 0x400>;



		#address-cells = <1>;

		#size-cells = <0>;



		gpa: gpio@0 {

			compatible = "ingenic,jz4740-gpio";

			reg = <0>;



			gpio-controller;

			gpio-ranges = <&pinctrl 0 0 32>;

			#gpio-cells = <2>;



			interrupt-controller;

			#interrupt-cells = <2>;



			interrupt-parent = <&intc>;

			interrupts = <28>;

		};



		gpb: gpio@1 {

			compatible = "ingenic,jz4740-gpio";

			reg = <1>;



			gpio-controller;

			gpio-ranges = <&pinctrl 0 32 32>;

			#gpio-cells = <2>;



			interrupt-controller;

			#interrupt-cells = <2>;



			interrupt-parent = <&intc>;

			interrupts = <27>;

		};



		gpc: gpio@2 {

			compatible = "ingenic,jz4740-gpio";

			reg = <2>;



			gpio-controller;

			gpio-ranges = <&pinctrl 0 64 32>;

			#gpio-cells = <2>;



			interrupt-controller;

			#interrupt-cells = <2>;



			interrupt-parent = <&intc>;

			interrupts = <26>;

		};



		gpd: gpio@3 {

			compatible = "ingenic,jz4740-gpio";

			reg = <3>;



			gpio-controller;

			gpio-ranges = <&pinctrl 0 96 32>;

			#gpio-cells = <2>;



			interrupt-controller;

			#interrupt-cells = <2>;



			interrupt-parent = <&intc>;

			interrupts = <25>;

		};

	};



	uart0: serial@10030000 {

		compatible = "ingenic,jz4740-uart";

		reg = <0x10030000 0x100>;