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Commit bdb10b24 authored May 19, 2021 by Linux Build Service Account

Merge 7dea9d66 on remote branch

Change-Id: If49b9363eebcb1b0ea6cd6d4d4e144c6ca3dd637

parents a0f9c60b 7dea9d66

bindings/arm/msm/msm.txt

+3 −0

Original line number	Diff line number	Diff line
		@@ -292,6 +292,9 @@ compatible = "qcom,holi-cdp"
		compatible = "qcom,holi-qrd"
		compatible = "qcom,holi-atp"
		compatible = "qcom,blair-rumi"
		compatible = "qcom,blair-mtp"
		compatible = "qcom,blair-cdp"
		compatible = "qcom,blair-atp"
		compatible = "qcom,scuba-idp"
		compatible = "qcom,monaco-rumi"
		compatible = "qcom,monaco"

bindings/clock/qcom,debugcc.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -16,6 +16,7 @@ Required properties :
		"qcom,monaco-debugcc"
		"qcom,direwolf-debugcc"
		"qcom,blair-debugcc"
		"qcom,scuba-debugcc"

		- qcom,gcc: phandle to the GCC device node.
		- qcom,videocc: phandle to the Video CC device node.

bindings/clock/qcom,dispcc.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -18,6 +18,7 @@ Required properties :
		"qcom,sa6155-dispcc"
		"qcom,monaco-dispcc"
		"qcom,blair-dispcc"
		"qcom,scuba-dispcc"

		- reg : shall contain base register location and length.
		- #clock-cells : from common clock binding, shall contain 1.

bindings/clock/qcom,gcc.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -40,6 +40,7 @@ Required properties :
		"qcom,monaco-gcc"
		"qcom,direwolf-gcc"
		"qcom,blair-gcc"
		"qcom,scuba-gcc"

		- reg : shall contain base register location and length
		- vdd_cx-supply: The vdd_cx logic rail supply.

bindings/clock/qcom,gpucc.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -14,6 +14,7 @@ Required properties :
		"qcom,sa6155-gpucc".
		"qcom,monaco-gpucc"
		"qcom,blair-gpucc"
		"qcom,scuba-gpucc"

		- reg: shall contain base register offset and size.
		- reg-names: names of registers listed in the same order as in the reg property.