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Commit bdae33b8 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Use maximum write flush for pwrite_gtt 



As recently disovered by forcing big-core (!llc) machines to use the GTT
paths, we need our full GTT write flush before manipulating the GTT PTE
or else the writes may be directed to the wrong page.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: stable@vger.kernel.org
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190718145407.21352-2-chris@chris-wilson.co.uk
parent d45a4dd5

drivers/gpu/drm/i915/i915_gem.c

+3 −2
Original line number Diff line number Diff line
@@ -610,7 +610,8 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj, 
		unsigned int page_length = PAGE_SIZE - page_offset;

		page_length = remain < page_length ? remain : page_length;

		if (node.allocated) {

			wmb(); /* flush the write before we modify the GGTT */

			/* flush the write before we modify the GGTT */

			intel_gt_flush_ggtt_writes(ggtt->vm.gt);

			ggtt->vm.insert_page(&ggtt->vm,

					     i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),

					     node.start, I915_CACHE_NONE, 0);
@@ -639,8 +640,8 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj, 
	i915_gem_object_unlock_fence(obj, fence);

out_unpin:

	mutex_lock(&i915->drm.struct_mutex);

	intel_gt_flush_ggtt_writes(ggtt->vm.gt);

	if (node.allocated) {

		wmb();

		ggtt->vm.clear_range(&ggtt->vm, node.start, node.size);

		remove_mappable_node(&node);

	} else {