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Commit bd86cfdc authored by Tero Kristo's avatar Tero Kristo
Browse files

clk: ti: clkdm: move clkdm gate clock support code to clock driver 



With the legacy clock data gone, this is no longer needed under platform,
so move it under the clock driver itself. Remove the exported clock driver
APIs as well, as these are not needed outside clock driver anymore.

Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
parent d5a04ddd

arch/arm/mach-omap2/clock.c

+0 −76
Original line number Diff line number Diff line
@@ -202,82 +202,6 @@ void omap2_init_clk_clkdm(struct clk_hw *hw) 
	}

}



/**

 * omap2_clkops_enable_clkdm - increment usecount on clkdm of @hw

 * @hw: struct clk_hw * of the clock being enabled

 *

 * Increment the usecount of the clockdomain of the clock pointed to

 * by @hw; if the usecount is 1, the clockdomain will be "enabled."

 * Only needed for clocks that don't use omap2_dflt_clk_enable() as

 * their enable function pointer.  Passes along the return value of

 * clkdm_clk_enable(), -EINVAL if @hw is not associated with a

 * clockdomain, or 0 if clock framework-based clockdomain control is

 * not implemented.

 */

int omap2_clkops_enable_clkdm(struct clk_hw *hw)

{

	struct clk_hw_omap *clk;

	int ret = 0;



	clk = to_clk_hw_omap(hw);



	if (unlikely(!clk->clkdm)) {

		pr_err("%s: %s: no clkdm set ?!\n", __func__,

		       __clk_get_name(hw->clk));

		return -EINVAL;

	}



	if (unlikely(clk->enable_reg))

		pr_err("%s: %s: should use dflt_clk_enable ?!\n", __func__,

		       __clk_get_name(hw->clk));



	if (ti_clk_get_features()->flags & TI_CLK_DISABLE_CLKDM_CONTROL) {

		pr_err("%s: %s: clkfw-based clockdomain control disabled ?!\n",

		       __func__, __clk_get_name(hw->clk));

		return 0;

	}



	ret = clkdm_clk_enable(clk->clkdm, hw->clk);

	WARN(ret, "%s: could not enable %s's clockdomain %s: %d\n",

	     __func__, __clk_get_name(hw->clk), clk->clkdm->name, ret);



	return ret;

}



/**

 * omap2_clkops_disable_clkdm - decrement usecount on clkdm of @hw

 * @hw: struct clk_hw * of the clock being disabled

 *

 * Decrement the usecount of the clockdomain of the clock pointed to

 * by @hw; if the usecount is 0, the clockdomain will be "disabled."

 * Only needed for clocks that don't use omap2_dflt_clk_disable() as their

 * disable function pointer.  No return value.

 */

void omap2_clkops_disable_clkdm(struct clk_hw *hw)

{

	struct clk_hw_omap *clk;



	clk = to_clk_hw_omap(hw);



	if (unlikely(!clk->clkdm)) {

		pr_err("%s: %s: no clkdm set ?!\n", __func__,

		       __clk_get_name(hw->clk));

		return;

	}



	if (unlikely(clk->enable_reg))

		pr_err("%s: %s: should use dflt_clk_disable ?!\n", __func__,

		       __clk_get_name(hw->clk));



	if (ti_clk_get_features()->flags & TI_CLK_DISABLE_CLKDM_CONTROL) {

		pr_err("%s: %s: clkfw-based clockdomain control disabled ?!\n",

		       __func__, __clk_get_name(hw->clk));

		return;

	}



	clkdm_clk_disable(clk->clkdm, hw->clk);

}



static int __initdata mpurate;



/*

arch/arm/mach-omap2/clock.h

+0 −3
Original line number Diff line number Diff line
@@ -202,9 +202,6 @@ extern const struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait; 
extern const struct clk_hw_omap_ops clkhwops_apll54;

extern const struct clk_hw_omap_ops clkhwops_apll96;



extern int omap2_clkops_enable_clkdm(struct clk_hw *hw);

extern void omap2_clkops_disable_clkdm(struct clk_hw *hw);



struct regmap;



int __init omap2_clk_provider_init(struct device_node *np, int index,

drivers/clk/ti/clock.h

+3 −0
Original line number Diff line number Diff line
@@ -180,6 +180,9 @@ extern const struct clk_hw_omap_ops clkhwops_iclk; 
extern const struct clk_hw_omap_ops clkhwops_iclk_wait;

extern const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait;



int omap2_clkops_enable_clkdm(struct clk_hw *hw);

void omap2_clkops_disable_clkdm(struct clk_hw *hw);



int omap2_dflt_clk_enable(struct clk_hw *hw);

void omap2_dflt_clk_disable(struct clk_hw *hw);

int omap2_dflt_clk_is_enabled(struct clk_hw *hw);

drivers/clk/ti/clockdomain.c

+76 −0
Original line number Diff line number Diff line
@@ -24,6 +24,82 @@ 
#undef pr_fmt

#define pr_fmt(fmt) "%s: " fmt, __func__



/**

 * omap2_clkops_enable_clkdm - increment usecount on clkdm of @hw

 * @hw: struct clk_hw * of the clock being enabled

 *

 * Increment the usecount of the clockdomain of the clock pointed to

 * by @hw; if the usecount is 1, the clockdomain will be "enabled."

 * Only needed for clocks that don't use omap2_dflt_clk_enable() as

 * their enable function pointer.  Passes along the return value of

 * clkdm_clk_enable(), -EINVAL if @hw is not associated with a

 * clockdomain, or 0 if clock framework-based clockdomain control is

 * not implemented.

 */

int omap2_clkops_enable_clkdm(struct clk_hw *hw)

{

	struct clk_hw_omap *clk;

	int ret = 0;



	clk = to_clk_hw_omap(hw);



	if (unlikely(!clk->clkdm)) {

		pr_err("%s: %s: no clkdm set ?!\n", __func__,

		       __clk_get_name(hw->clk));

		return -EINVAL;

	}



	if (unlikely(clk->enable_reg))

		pr_err("%s: %s: should use dflt_clk_enable ?!\n", __func__,

		       __clk_get_name(hw->clk));



	if (ti_clk_get_features()->flags & TI_CLK_DISABLE_CLKDM_CONTROL) {

		pr_err("%s: %s: clkfw-based clockdomain control disabled ?!\n",

		       __func__, __clk_get_name(hw->clk));

		return 0;

	}



	ret = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk);

	WARN(ret, "%s: could not enable %s's clockdomain %s: %d\n",

	     __func__, __clk_get_name(hw->clk), clk->clkdm_name, ret);



	return ret;

}



/**

 * omap2_clkops_disable_clkdm - decrement usecount on clkdm of @hw

 * @hw: struct clk_hw * of the clock being disabled

 *

 * Decrement the usecount of the clockdomain of the clock pointed to

 * by @hw; if the usecount is 0, the clockdomain will be "disabled."

 * Only needed for clocks that don't use omap2_dflt_clk_disable() as their

 * disable function pointer.  No return value.

 */

void omap2_clkops_disable_clkdm(struct clk_hw *hw)

{

	struct clk_hw_omap *clk;



	clk = to_clk_hw_omap(hw);



	if (unlikely(!clk->clkdm)) {

		pr_err("%s: %s: no clkdm set ?!\n", __func__,

		       __clk_get_name(hw->clk));

		return;

	}



	if (unlikely(clk->enable_reg))

		pr_err("%s: %s: should use dflt_clk_disable ?!\n", __func__,

		       __clk_get_name(hw->clk));



	if (ti_clk_get_features()->flags & TI_CLK_DISABLE_CLKDM_CONTROL) {

		pr_err("%s: %s: clkfw-based clockdomain control disabled ?!\n",

		       __func__, __clk_get_name(hw->clk));

		return;

	}



	ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk);

}



static void __init of_ti_clockdomain_setup(struct device_node *node)

{

	struct clk *clk;

include/linux/clk/ti.h

+0 −2
Original line number Diff line number Diff line
@@ -272,8 +272,6 @@ extern const struct clk_ops ti_clk_mux_ops; 
#define to_clk_hw_omap(_hw) container_of(_hw, struct clk_hw_omap, hw)



void omap2_init_clk_clkdm(struct clk_hw *clk);

int omap2_clkops_enable_clkdm(struct clk_hw *hw);

void omap2_clkops_disable_clkdm(struct clk_hw *hw);

int omap2_clk_disable_autoidle_all(void);

int omap2_clk_enable_autoidle_all(void);

int omap2_clk_allow_idle(struct clk *clk);