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Commit bd69baaa authored by René van Dorst's avatar René van Dorst Committed by David S. Miller
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dt-bindings: net: ethernet: Update mt7622 docs and dts to reflect the new phylink API 



This patch the removes the recently added mediatek,physpeed property.
Use the fixed-link property speed = <2500> to set the phy in 2.5Gbit.
See mt7622-bananapi-bpi-r64.dts for a working example.

Signed-off-by: default avatarRené van Dorst <opensource@vdorst.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 7e538372

Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.txt

+0 −2
Original line number Diff line number Diff line
@@ -9,8 +9,6 @@ Required Properties: 
	- "mediatek,mt7622-sgmiisys", "syscon"

	- "mediatek,mt7629-sgmiisys", "syscon"

- #clock-cells: Must be 1

- mediatek,physpeed: Should be one of "auto", "1000" or "2500" to match up

		     the capability of the target PHY.



The SGMIISYS controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts

+19 −9
Original line number Diff line number Diff line
@@ -115,24 +115,34 @@ 
};



&eth {

	pinctrl-names = "default";

	pinctrl-0 = <&eth_pins>;

	status = "okay";

	gmac0: mac@0 {

		compatible = "mediatek,eth-mac";

		reg = <0>;

		phy-mode = "2500base-x";



		fixed-link {

			speed = <2500>;

			full-duplex;

			pause;

		};

	};



	gmac1: mac@1 {

		compatible = "mediatek,eth-mac";

		reg = <1>;

		phy-handle = <&phy5>;

		phy-mode = "rgmii";



		fixed-link {

			speed = <1000>;

			full-duplex;

			pause;

		};

	};



	mdio-bus {

	mdio: mdio-bus {

		#address-cells = <1>;

		#size-cells = <0>;



		phy5: ethernet-phy@5 {

			reg = <5>;

			phy-mode = "sgmii";

		};

	};

};

arch/arm64/boot/dts/mediatek/mt7622.dtsi

+0 −1
Original line number Diff line number Diff line
@@ -931,6 +931,5 @@ 
			     "syscon";

		reg = <0 0x1b128000 0 0x3000>;

		#clock-cells = <1>;

		mediatek,physpeed = "2500";

	};

};