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Commit bccd0de5 authored by Sandeep Singh's avatar Sandeep Singh
Browse files

ARM: dts: msm: Add icnss node on holi 

Add entry for membase, CE interrupt vectors
and WLAN SMP2P interrupts for holi.

Change-Id: I0a753b79dc0cc75d83a5a0e78626e85ebcb46443
parent d428ea15

qcom/holi.dtsi

+33 −0
Original line number Diff line number Diff line
@@ -1438,6 +1438,12 @@ 
			interrupt-controller;

			#interrupt-cells = <2>;

		};



		smp2p_wlan_1_in: qcom,smp2p-wlan-1-in {

			qcom,entry-name = "wlan";

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	qcom,smp2p-cdsp {
@@ -2081,6 +2087,33 @@ 
		qcom,secure-eud-en;

		status = "ok";

	};



	icnss: qcom,icnss@C800000 {

		status = "disabled";

		compatible = "qcom,icnss";

		reg = <0xC800000 0x800000>;

		reg-names = "membase";

		interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH /* CE0 */ >,

			     <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH /* CE1 */ >,

			     <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH /* CE2 */ >,

			     <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH /* CE3 */ >,

			     <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH /* CE4 */ >,

			     <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH /* CE5 */ >,

			     <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH /* CE6 */ >,

			     <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH /* CE7 */ >,

			     <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH /* CE8 */ >,

			     <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH /* CE9 */ >,

			     <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH /* CE10 */ >,

			     <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH /* CE11 */ >;

		qcom,iommu-dma = "bypass";

		qcom,wlan-msa-fixed-region = <&pil_wlan_mem>;

		qcom,smp2p_map_wlan_1_in {

			interrupts-extended = <&smp2p_wlan_1_in 0 0>,

					      <&smp2p_wlan_1_in 1 0>;

			interrupt-names = "qcom,smp2p-force-fatal-error",

					  "qcom,smp2p-early-crash-ind";

		};

	};

};



#define PMK8350_SID	6