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Commit bccaa3f9 authored by Jian Hu's avatar Jian Hu Committed by Thierry Reding
Browse files

pwm: meson: Add clock source configuration for Meson-AXG 



For PWM controller in the Meson-AXG SoC, the EE domain and AO domain
have different clock sources. This patch tries to describe them in the
DT compatible data.

Signed-off-by: default avatarJian Hu <jian.hu@amlogic.com>
Signed-off-by: default avatarYixun Lan <yixun.lan@amlogic.com>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
parent a52d97ca

drivers/pwm/pwm-meson.c

+26 −0
Original line number Diff line number Diff line
@@ -411,6 +411,24 @@ static const struct meson_pwm_data pwm_gxbb_ao_data = { 
	.num_parents = ARRAY_SIZE(pwm_gxbb_ao_parent_names),

};



static const char * const pwm_axg_ee_parent_names[] = {

	"xtal", "fclk_div5", "fclk_div4", "fclk_div3"

};



static const struct meson_pwm_data pwm_axg_ee_data = {

	.parent_names = pwm_axg_ee_parent_names,

	.num_parents = ARRAY_SIZE(pwm_axg_ee_parent_names),

};



static const char * const pwm_axg_ao_parent_names[] = {

	"aoclk81", "xtal", "fclk_div4", "fclk_div5"

};



static const struct meson_pwm_data pwm_axg_ao_data = {

	.parent_names = pwm_axg_ao_parent_names,

	.num_parents = ARRAY_SIZE(pwm_axg_ao_parent_names),

};



static const struct of_device_id meson_pwm_matches[] = {

	{

		.compatible = "amlogic,meson8b-pwm",
@@ -424,6 +442,14 @@ static const struct of_device_id meson_pwm_matches[] = { 
		.compatible = "amlogic,meson-gxbb-ao-pwm",

		.data = &pwm_gxbb_ao_data

	},

	{

		.compatible = "amlogic,meson-axg-ee-pwm",

		.data = &pwm_axg_ee_data

	},

	{

		.compatible = "amlogic,meson-axg-ao-pwm",

		.data = &pwm_axg_ao_data

	},

	{},

};

MODULE_DEVICE_TABLE(of, meson_pwm_matches);