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Commit bc6080ae authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'drm-next-2018-11-02' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
 "Pretty much a normal fixes pull pre-rc1, mostly amdgpu fixes, one i915
  link training regression fix, and a couple of minor panel/bridge fixes
  and a panel quirk"

* tag 'drm-next-2018-11-02' of git://anongit.freedesktop.org/drm/drm: (37 commits)
  drm/amdgpu: revert "enable gfxoff in non-sriov and stutter mode by default"
  drm/amd/pp: Print warning if od_sclk/mclk out of range
  drm/amd/pp: Fix pp_sclk/mclk_od not work on Vega10
  drm/amd/pp: Fix pp_sclk/mclk_od not work on smu7
  drm/amd/powerplay: no MGPU fan boost enablement on DPM disabled
  drm/amdgpu: Fix skipping hangged job reset during gpu recover.
  drm/amd/powerplay: revise Vega20 pptable version check
  drm/amd/display: set backlight level limit to 1
  drm/panel: simple: Innolux TV123WAM is actually P120ZDG-BF1
  dt-bindings: drm/panel: simple: Innolux TV123WAM is actually P120ZDG-BF1
  drm/bridge: ti-sn65dsi86: Remove the mystery delay
  drm/panel: simple: Add "no-hpd" delay for Innolux TV123WAM
  drm/panel: simple: Support panels with HPD where HPD isn't connected
  dt-bindings: drm/panel: simple: Add no-hpd property
  drm/edid: Add 6 bpc quirk for BOE panel.
  drm/amdgpu: fix reporting of failed msg sent to SMU (v2)
  drm/amdgpu: Fix compute ring 1.0.0 failure after reset
  drm/amdgpu: fix VM leaf walking
  drm/amdgpu: fix amdgpu_vm_fini
  drm/amd/powerplay: commonize the API for retrieving current clocks
  ...
parents d81f50bd f9885ef8
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+5 −3
Original line number Diff line number Diff line
Innolux TV123WAM 12.3 inch eDP 2K display panel
Innolux P120ZDG-BF1 12.02 inch eDP 2K display panel

This binding is compatible with the simple-panel binding, which is specified
in simple-panel.txt in this directory.

Required properties:
- compatible: should be "innolux,tv123wam"
- compatible: should be "innolux,p120zdg-bf1"
- power-supply: regulator to provide the supply voltage

Optional properties:
- enable-gpios: GPIO pin to enable or disable the panel
- backlight: phandle of the backlight device attached to the panel
- no-hpd: If HPD isn't hooked up; add this property.

Example:
	panel_edp: panel-edp {
		compatible = "innolux,tv123wam";
		compatible = "innolux,p120zdg-bf1";
		enable-gpios = <&msmgpio 31 GPIO_ACTIVE_LOW>;
		power-supply = <&pm8916_l2>;
		backlight = <&backlight>;
		no-hpd;
	};
+3 −0
Original line number Diff line number Diff line
@@ -11,6 +11,9 @@ Optional properties:
- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
- enable-gpios: GPIO pin to enable or disable the panel
- backlight: phandle of the backlight device attached to the panel
- no-hpd: This panel is supposed to communicate that it's ready via HPD
  (hot plug detect) signal, but the signal isn't hooked up so we should
  hardcode the max delay from the panel spec when powering up the panel.

Example:

+4 −2
Original line number Diff line number Diff line
@@ -135,7 +135,8 @@ static int acp_poweroff(struct generic_pm_domain *genpd)
	 * 2. power off the acp tiles
	 * 3. check and enter ulv state
	 */
		if (adev->powerplay.pp_funcs->set_powergating_by_smu)
		if (adev->powerplay.pp_funcs &&
			adev->powerplay.pp_funcs->set_powergating_by_smu)
			amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true);
	}
	return 0;
@@ -517,7 +518,8 @@ static int acp_set_powergating_state(void *handle,
	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
	bool enable = state == AMD_PG_STATE_GATE ? true : false;

	if (adev->powerplay.pp_funcs->set_powergating_by_smu)
	if (adev->powerplay.pp_funcs &&
		adev->powerplay.pp_funcs->set_powergating_by_smu)
		amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, enable);

	return 0;
+2 −4
Original line number Diff line number Diff line
@@ -1493,8 +1493,6 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
	}

	adev->powerplay.pp_feature = amdgpu_pp_feature_mask;
	if (amdgpu_sriov_vf(adev))
		adev->powerplay.pp_feature &= ~PP_GFXOFF_MASK;

	for (i = 0; i < adev->num_ip_blocks; i++) {
		if ((amdgpu_ip_block_mask & (1 << i)) == 0) {
@@ -1600,7 +1598,7 @@ static int amdgpu_device_fw_loading(struct amdgpu_device *adev)
		}
	}

	if (adev->powerplay.pp_funcs->load_firmware) {
	if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->load_firmware) {
		r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle);
		if (r) {
			pr_err("firmware loading failed\n");
@@ -3341,7 +3339,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,

		kthread_park(ring->sched.thread);

		if (job && job->base.sched == &ring->sched)
		if (job && job->base.sched != &ring->sched)
			continue;

		drm_sched_hw_job_reset(&ring->sched, job ? &job->base : NULL);
+2 −2
Original line number Diff line number Diff line
@@ -114,8 +114,8 @@ uint amdgpu_pg_mask = 0xffffffff;
uint amdgpu_sdma_phase_quantum = 32;
char *amdgpu_disable_cu = NULL;
char *amdgpu_virtual_display = NULL;
/* OverDrive(bit 14) disabled by default*/
uint amdgpu_pp_feature_mask = 0xffffbfff;
/* OverDrive(bit 14),gfxoff(bit 15),stutter mode(bit 17) disabled by default*/
uint amdgpu_pp_feature_mask = 0xfffd3fff;
int amdgpu_ngg = 0;
int amdgpu_prim_buf_per_se = 0;
int amdgpu_pos_buf_per_se = 0;
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