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Unverified Commit bc3bd041 authored by Miquel Raynal's avatar Miquel Raynal Committed by Maxime Ripard
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ARM: dts: sun8i: a23/a33: declare NAND pins 



Declare NAND pins (bus, chip select and ready/busy) for a23/a33 SoCs.

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
parent 9a209c6e

arch/arm/boot/dts/sun8i-a23-a33.dtsi

+33 −0
Original line number Diff line number Diff line
@@ -198,6 +198,8 @@ 
			clock-names = "ahb", "mod";

			resets = <&ccu RST_BUS_NAND>;

			reset-names = "ahb";

			pinctrl-names = "default";

			pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;

			status = "disabled";

			#address-cells = <1>;

			#size-cells = <0>;
@@ -315,6 +317,37 @@ 
				bias-pull-up;

			};



			nand_pins: nand-pins {

				pins = "PC0", "PC1", "PC2", "PC5",

				       "PC8", "PC9", "PC10", "PC11",

				       "PC12", "PC13", "PC14", "PC15";

				function = "nand0";

			};



			nand_pins_cs0: nand-pins-cs0 {

				pins = "PC4";

				function = "nand0";

				bias-pull-up;

			};



			nand_pins_cs1: nand-pins-cs1 {

				pins = "PC3";

				function = "nand0";

				bias-pull-up;

			};



			nand_pins_rb0: nand-pins-rb0 {

				pins = "PC6";

				function = "nand0";

				bias-pull-up;

			};



			nand_pins_rb1: nand-pins-rb1 {

				pins = "PC7";

				function = "nand0";

				bias-pull-up;

			};



			pwm0_pins: pwm0 {

				pins = "PH0";

				function = "pwm0";