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Commit bbd60bff authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mmc-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc 

Pull MMC updates from Ulf Hansson:
 "Updates for MMC for v4.19.

  MMC core:
   - Add some fine-grained hooks to further support HS400 tuning
   - Improve error path for bus width setting for HS400es
   - Use a common method when checking R1 status

  MMC host:
   - renesas_sdhi: Add r8a77990 support
   - renesas_sdhi: Add eMMC HS400 mode support
   - tmio/renesas_sdhi: Improve tuning/clock management
   - tmio: Add eMMC HS400 mode support
   - sunxi: Add support for 3.3V eMMC DDR mode
   - mmci: Initial support to manage variant specific callbacks
   - sdhci: Don't try 3.3V I/O voltage if not supported
   - sdhci-pci-dwc-mshc: Add driver to support Synopsys dwc mshc SDHCI PCI
   - sdhci-of-dwcmshc: Add driver to support Synopsys DWC MSHC SDHCI
   - sdhci-msm: Add support for new version sdcc V5
   - sdhci-pci-o2micro: Add support for O2 eMMC HS200 mode
   - sdhci-pci-o2micro: Add support for O2 hardware tuning
   - sdhci-pci-o2micro: Add MSI interrupt support for O2 SD host
   - sdhci-pci: Add support for Intel ICP
   - sdhci-tegra: Prevent ACMD23 and HS200 mode on Tegra 3
   - sdhci-tegra: Fix eMMC DDR52 mode
   - sdhci-tegra: Improve clock management
   - dw_mmc-rockchip: Document compatible string for px30
   - sdhci-esdhc-imx: Add support for 3.3V eMMC DDR mode
   - sdhci-of-esdhc: Set proper DMA mask for ls104x chips
   - sdhci-of-esdhc: Improve clock management
   - sdhci-of-arasan: Add a quirk to manage unstable clocks
   - dw_mmc-exynos: Address potential external abort during system resume
   - pxamci: Add support for common MMC DT bindings
   - pxamci: Several cleanups and improvements
   - pxamci: Merge immutable branch for pxa to switch to DMA slave maps"

* tag 'mmc-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (56 commits)
  mmc: core: improve reasonableness of bus width setting for HS400es
  mmc: tmio: remove unneeded variable in tmio_mmc_start_command()
  mmc: renesas_sdhi: Fix sampling clock position selecting
  mmc: tmio: Fix tuning flow
  mmc: sunxi: remove output of virtual base address
  dt-bindings: mmc: rockchip-dw-mshc: add description for px30
  mmc: renesas_sdhi: Add r8a77990 support
  mmc: sunxi: allow 3.3V DDR when DDR is available
  mmc: mmci: Add and implement a ->dma_setup() callback for qcom dml
  mmc: mmci: Initial support to manage variant specific callbacks
  mmc: tegra: Force correct divider calculation on DDR50/52
  mmc: sdhci: Add MSI interrupt support for O2 SD host
  mmc: sdhci: Add support for O2 hardware tuning
  mmc: sdhci: Export sdhci tuning function symbol
  mmc: sdhci: Change O2 Host HS200 mode clock frequency to 200MHz
  mmc: sdhci: Add support for O2 eMMC HS200 mode
  mmc: tegra: Add and use tegra_sdhci_get_max_clock()
  mmc: sdhci-esdhc-imx: fix indent
  mmc: sdhci-esdhc-imx: disable clocks before changing frequency
  mmc: tegra: prevent ACMD23 on Tegra 3
  ...
parents 30779715 7f38abf2

Documentation/devicetree/bindings/mmc/arasan,sdhci.txt

+2 −0
Original line number Diff line number Diff line
@@ -37,6 +37,8 @@ Optional Properties: 
  - xlnx,fails-without-test-cd: when present, the controller doesn't work when

    the CD line is not connected properly, and the line is not connected

    properly. Test mode can be used to force the controller to function.

  - xlnx,int-clock-stable-broken: when present, the controller always reports

    that the internal clock is stable even when it is not.



Example:

	sdhci@e0100000 {

Documentation/devicetree/bindings/mmc/pxa-mmc.txt

+3 −3
Original line number Diff line number Diff line
@@ -8,10 +8,9 @@ Required properties: 


Optional properties:

- marvell,detect-delay-ms: sets the detection delay timeout in ms.

- marvell,gpio-power: GPIO spec for the card power enable pin



This file documents differences between the core properties in mmc.txt

and the properties used by the pxa-mmc driver.

In addition to the properties described in this docuent, the details

described in mmc.txt are supported.



Examples:
@@ -19,6 +18,7 @@ mmc0: mmc@41100000 { 
	compatible = "marvell,pxa-mmc";

	reg = <0x41100000 0x1000>;

	interrupts = <23>;

	vmmc-supply = <&mmc_regulator>;

	cd-gpios = <&gpio 23 0>;

	wp-gpios = <&gpio 24 0>;

};

Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ Required Properties: 
							before RK3288

	- "rockchip,rk3288-dw-mshc": for Rockchip RK3288

	- "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108

	- "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip PX30

	- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036

	- "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK322x

	- "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3328

Documentation/devicetree/bindings/mmc/sdhci-msm.txt

+6 −1
Original line number Diff line number Diff line
@@ -4,7 +4,12 @@ This file documents differences between the core properties in mmc.txt 
and the properties used by the sdhci-msm driver.



Required properties:

- compatible: Should contain "qcom,sdhci-msm-v4".

- compatible: Should contain:

		"qcom,sdhci-msm-v4" for sdcc versions less than 5.0

		"qcom,sdhci-msm-v5" for sdcc versions >= 5.0

		For SDCC version 5.0.0, MCI registers are removed from SDCC

		interface and some registers are moved to HC. New compatible

		string is added to support this change - "qcom,sdhci-msm-v5".

- reg: Base address and length of the register in the following order:

	- Host controller register map (required)

	- SD Core register map (required)

Documentation/devicetree/bindings/mmc/sdhci-of-dwcmshc.txt

0 → 100644
+20 −0
Original line number Diff line number Diff line 
* Synopsys DesignWare Cores Mobile Storage Host Controller



Required properties:

- compatible: should be one of the following:

    "snps,dwcmshc-sdhci"

- reg: offset and length of the register set for the device.

- interrupts: a single interrupt specifier.

- clocks: Array of clocks required for SDHCI; requires at least one for

    core clock.

- clock-names: Array of names corresponding to clocks property; shall be

    "core" for core clock and "bus" for optional bus clock.



Example:

	sdhci2: sdhci@aa0000 {

		compatible = "snps,dwcmshc-sdhci";

		reg = <0xaa0000 0x1000>;

		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&emmcclk>;

		bus-width = <8>;

	}