Loading msm/sde/sde_encoder_phys.h +1 −4 Original line number Diff line number Diff line Loading @@ -52,16 +52,13 @@ enum sde_enc_split_role { * @SDE_ENC_ENABLED: Encoder is enabled * @SDE_ENC_ERR_NEEDS_HW_RESET: Encoder is enabled, but requires a hw_reset * to recover from a previous error * @SDE_ENC_TIMING_ENGINE_RECONFIG: Encoder is enabled and timing engine * parameters are updated */ enum sde_enc_enable_state { SDE_ENC_DISABLING, SDE_ENC_DISABLED, SDE_ENC_ENABLING, SDE_ENC_ENABLED, SDE_ENC_ERR_NEEDS_HW_RESET, SDE_ENC_TIMING_ENGINE_RECONFIG, SDE_ENC_ERR_NEEDS_HW_RESET }; struct sde_encoder_phys; Loading msm/sde/sde_encoder_phys_vid.c +0 −7 Original line number Diff line number Diff line Loading @@ -830,8 +830,6 @@ static void sde_encoder_phys_vid_enable(struct sde_encoder_phys *phys_enc) /* ctl_flush & timing engine enable will be triggered by framework */ if (phys_enc->enable_state == SDE_ENC_DISABLED) phys_enc->enable_state = SDE_ENC_ENABLING; if (phys_enc->enable_state == SDE_ENC_ENABLED) phys_enc->enable_state = SDE_ENC_TIMING_ENGINE_RECONFIG; } static void sde_encoder_phys_vid_destroy(struct sde_encoder_phys *phys_enc) Loading Loading @@ -1122,11 +1120,6 @@ static void sde_encoder_phys_vid_handle_post_kickoff( lock_flags); } phys_enc->enable_state = SDE_ENC_ENABLED; } else if (phys_enc->enable_state == SDE_ENC_TIMING_ENGINE_RECONFIG) { /* add 2 vsync delay for timing engine change */ sde_encoder_phys_vid_single_vblank_wait(phys_enc); sde_encoder_phys_vid_single_vblank_wait(phys_enc); phys_enc->enable_state = SDE_ENC_ENABLED; } avr_mode = sde_connector_get_qsync_mode(phys_enc->connector); Loading Loading
msm/sde/sde_encoder_phys.h +1 −4 Original line number Diff line number Diff line Loading @@ -52,16 +52,13 @@ enum sde_enc_split_role { * @SDE_ENC_ENABLED: Encoder is enabled * @SDE_ENC_ERR_NEEDS_HW_RESET: Encoder is enabled, but requires a hw_reset * to recover from a previous error * @SDE_ENC_TIMING_ENGINE_RECONFIG: Encoder is enabled and timing engine * parameters are updated */ enum sde_enc_enable_state { SDE_ENC_DISABLING, SDE_ENC_DISABLED, SDE_ENC_ENABLING, SDE_ENC_ENABLED, SDE_ENC_ERR_NEEDS_HW_RESET, SDE_ENC_TIMING_ENGINE_RECONFIG, SDE_ENC_ERR_NEEDS_HW_RESET }; struct sde_encoder_phys; Loading
msm/sde/sde_encoder_phys_vid.c +0 −7 Original line number Diff line number Diff line Loading @@ -830,8 +830,6 @@ static void sde_encoder_phys_vid_enable(struct sde_encoder_phys *phys_enc) /* ctl_flush & timing engine enable will be triggered by framework */ if (phys_enc->enable_state == SDE_ENC_DISABLED) phys_enc->enable_state = SDE_ENC_ENABLING; if (phys_enc->enable_state == SDE_ENC_ENABLED) phys_enc->enable_state = SDE_ENC_TIMING_ENGINE_RECONFIG; } static void sde_encoder_phys_vid_destroy(struct sde_encoder_phys *phys_enc) Loading Loading @@ -1122,11 +1120,6 @@ static void sde_encoder_phys_vid_handle_post_kickoff( lock_flags); } phys_enc->enable_state = SDE_ENC_ENABLED; } else if (phys_enc->enable_state == SDE_ENC_TIMING_ENGINE_RECONFIG) { /* add 2 vsync delay for timing engine change */ sde_encoder_phys_vid_single_vblank_wait(phys_enc); sde_encoder_phys_vid_single_vblank_wait(phys_enc); phys_enc->enable_state = SDE_ENC_ENABLED; } avr_mode = sde_connector_get_qsync_mode(phys_enc->connector); Loading