Loading drivers/iommu/arm-smmu.c +0 −43 Original line number Diff line number Diff line Loading @@ -4037,59 +4037,16 @@ static bool arm_smmu_is_iova_coherent(struct iommu_domain *domain, return ret; } static void arm_smmu_trigger_fault(struct iommu_domain *domain, unsigned long flags) { struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; struct arm_smmu_device *smmu; int idx = cfg->cbndx; if (!smmu_domain->smmu) { pr_err("Can't trigger faults on non-attached domains\n"); return; } smmu = smmu_domain->smmu; if (arm_smmu_power_on(smmu->pwr)) return; dev_err(smmu->dev, "Writing 0x%lx to FSRRESTORE on cb %d\n", flags, cfg->cbndx); arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSRRESTORE, flags); /* give the interrupt time to fire... */ msleep(1000); arm_smmu_power_off(smmu, smmu->pwr); } static void arm_smmu_tlbi_domain(struct iommu_domain *domain) { arm_smmu_tlb_inv_context_s1(to_smmu_domain(domain)); } static int arm_smmu_enable_config_clocks(struct iommu_domain *domain) { struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); return arm_smmu_power_on(smmu_domain->smmu->pwr); } static void arm_smmu_disable_config_clocks(struct iommu_domain *domain) { struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); arm_smmu_power_off(smmu_domain->smmu, smmu_domain->smmu->pwr); } static struct msm_iommu_ops arm_smmu_ops = { .map_sg = arm_smmu_map_sg, .iova_to_phys_hard = arm_smmu_iova_to_phys_hard, .is_iova_coherent = arm_smmu_is_iova_coherent, .trigger_fault = arm_smmu_trigger_fault, .tlbi_domain = arm_smmu_tlbi_domain, .enable_config_clocks = arm_smmu_enable_config_clocks, .disable_config_clocks = arm_smmu_disable_config_clocks, .iova_to_pte = arm_smmu_iova_to_pte, .iommu_ops = { Loading drivers/iommu/iommu-debug.c +1 −119 Original line number Diff line number Diff line Loading @@ -126,8 +126,6 @@ struct iommu_debug_device { u64 phys; size_t len; struct list_head list; struct mutex clk_lock; unsigned int clk_count; /* Protects domain */ struct mutex state_lock; #ifdef CONFIG_ARM64_PTDUMP_CORE Loading Loading @@ -654,10 +652,6 @@ static int iommu_debug_profiling_fast_dma_api_show(struct seq_file *s, } domain = ddev->domain; if (iommu_enable_config_clocks(domain)) { seq_puts(s, "Couldn't enable clocks\n"); goto out_detach; } for (experiment = 0; experiment < 2; ++experiment) { size_t map_avg = 0, unmap_avg = 0; Loading @@ -674,7 +668,7 @@ static int iommu_debug_profiling_fast_dma_api_show(struct seq_file *s, ns = ktime_to_ns(diff); if (dma_mapping_error(dev, dma_addr)) { seq_puts(s, "dma_map_single failed\n"); goto out_disable_config_clocks; goto out_detach; } map_elapsed_ns[i] = ns; Loading Loading @@ -709,8 +703,6 @@ static int iommu_debug_profiling_fast_dma_api_show(struct seq_file *s, seq_printf(s, "] (avg: %zu)\n", unmap_avg); } out_disable_config_clocks: iommu_disable_config_clocks(domain); out_detach: iommu_debug_dma_deconfigure(ddev); out_kfree: Loading Loading @@ -1278,12 +1270,7 @@ static int __apply_to_new_mapping(struct seq_file *s, } dev_err_ratelimited(dev, "testing with pgtables at %pa\n", &pt_phys); if (iommu_enable_config_clocks(domain)) { ds_printf(dev, s, "Couldn't enable clocks\n"); goto out_release_mapping; } ret = fn(dev, s, domain, priv); iommu_disable_config_clocks(domain); out_release_mapping: iommu_debug_dma_deconfigure(ddev); Loading Loading @@ -2013,96 +2000,6 @@ static const struct file_operations iommu_debug_dma_unmap_fops = { .write = iommu_debug_dma_unmap_write, }; static ssize_t iommu_debug_config_clocks_write(struct file *file, const char __user *ubuf, size_t count, loff_t *offset) { char buf; struct iommu_debug_device *ddev = file->private_data; struct device *dev = ddev->dev; /* we're expecting a single character plus (optionally) a newline */ if (count > 2) { dev_err_ratelimited(dev, "Invalid value\n"); return -EINVAL; } if (!ddev->domain) { dev_err_ratelimited(dev, "No domain. Did you already attach?\n"); return -EINVAL; } if (copy_from_user(&buf, ubuf, 1)) { dev_err_ratelimited(dev, "Couldn't copy from user\n"); return -EFAULT; } mutex_lock(&ddev->clk_lock); switch (buf) { case '0': if (ddev->clk_count == 0) { dev_err_ratelimited(dev, "Config clocks already disabled\n"); break; } if (--ddev->clk_count > 0) break; dev_err_ratelimited(dev, "Disabling config clocks\n"); iommu_disable_config_clocks(ddev->domain); break; case '1': if (ddev->clk_count++ > 0) break; dev_err_ratelimited(dev, "Enabling config clocks\n"); if (iommu_enable_config_clocks(ddev->domain)) dev_err_ratelimited(dev, "Failed!\n"); break; default: dev_err_ratelimited(dev, "Invalid value. Should be 0 or 1.\n"); mutex_unlock(&ddev->clk_lock); return -EINVAL; } mutex_unlock(&ddev->clk_lock); return count; } static const struct file_operations iommu_debug_config_clocks_fops = { .open = simple_open, .write = iommu_debug_config_clocks_write, }; static ssize_t iommu_debug_trigger_fault_write( struct file *file, const char __user *ubuf, size_t count, loff_t *offset) { struct iommu_debug_device *ddev = file->private_data; unsigned long flags; if (kstrtoul_from_user(ubuf, count, 0, &flags)) { pr_err_ratelimited("Invalid flags format\n"); return -EFAULT; } mutex_lock(&ddev->state_lock); if (!ddev->domain) { pr_err_ratelimited("No domain. Did you already attach?\n"); mutex_unlock(&ddev->state_lock); return -EINVAL; } iommu_trigger_fault(ddev->domain, flags); mutex_unlock(&ddev->state_lock); return count; } static const struct file_operations iommu_debug_trigger_fault_fops = { .open = simple_open, .write = iommu_debug_trigger_fault_write, }; #ifdef CONFIG_ARM64_PTDUMP_CORE static int ptdump_show(struct seq_file *s, void *v) { Loading Loading @@ -2162,7 +2059,6 @@ static int iommu_debug_device_setup(struct device *dev) if (!ddev) return -ENOMEM; mutex_init(&ddev->clk_lock); mutex_init(&ddev->state_lock); ddev->dev = dev; dir = debugfs_create_dir(dev_name(dev), debugfs_tests_dir); Loading Loading @@ -2298,20 +2194,6 @@ static int iommu_debug_device_setup(struct device *dev) goto err_rmdir; } if (!debugfs_create_file("config_clocks", 0200, dir, ddev, &iommu_debug_config_clocks_fops)) { pr_err_ratelimited("Couldn't create iommu/devices/%s/config_clocks debugfs file\n", dev_name(dev)); goto err_rmdir; } if (!debugfs_create_file("trigger-fault", 0200, dir, ddev, &iommu_debug_trigger_fault_fops)) { pr_err_ratelimited("Couldn't create iommu/devices/%s/trigger-fault debugfs file\n", dev_name(dev)); goto err_rmdir; } #ifdef CONFIG_ARM64_PTDUMP_CORE if (!debugfs_create_file("iommu_page_tables", 0200, dir, ddev, &ptdump_fops)) { Loading drivers/iommu/iommu.c +0 −17 Original line number Diff line number Diff line Loading @@ -2234,23 +2234,6 @@ void iommu_put_resv_regions(struct device *dev, struct list_head *list) ops->put_resv_regions(dev, list); } /** * iommu_trigger_fault() - trigger an IOMMU fault * @domain: iommu domain * * Triggers a fault on the device to which this domain is attached. * * This function should only be used for debugging purposes, for obvious * reasons. */ void iommu_trigger_fault(struct iommu_domain *domain, unsigned long flags) { struct msm_iommu_ops *ops = to_msm_iommu_ops(domain->ops); if (ops->trigger_fault) ops->trigger_fault(domain, flags); } struct iommu_resv_region *iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot, enum iommu_resv_type type) Loading include/linux/iommu.h +0 −40 Original line number Diff line number Diff line Loading @@ -390,10 +390,7 @@ struct iommu_ops { * to an iommu domain * @iova_to_phys_hard: translate iova to physical address using IOMMU hardware * @is_iova_coherent: checks coherency of the given iova * @trigger_fault: trigger a fault on the device attached to an iommu domain * @tlbi_domain: Invalidate all TLBs covering an iommu domain * @enable_config_clocks: Enable all config clocks for this domain's IOMMU * @disable_config_clocks: Disable all config clocks for this domain's IOMMU * @iova_to_pte: translate iova to Page Table Entry (PTE). * @iommu_ops: the standard iommu ops */ Loading @@ -404,10 +401,7 @@ struct msm_iommu_ops { dma_addr_t iova, unsigned long trans_flags); bool (*is_iova_coherent)(struct iommu_domain *domain, dma_addr_t iova); void (*trigger_fault)(struct iommu_domain *domain, unsigned long flags); void (*tlbi_domain)(struct iommu_domain *domain); int (*enable_config_clocks)(struct iommu_domain *domain); void (*disable_config_clocks)(struct iommu_domain *domain); uint64_t (*iova_to_pte)(struct iommu_domain *domain, dma_addr_t iova); struct iommu_ops iommu_ops; }; Loading Loading @@ -658,9 +652,6 @@ static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain, gather->start = start; } extern void iommu_trigger_fault(struct iommu_domain *domain, unsigned long flags); /* PCI device grouping function */ extern struct iommu_group *pci_device_group(struct device *dev); /* Generic device grouping function */ Loading @@ -676,23 +667,6 @@ static inline void iommu_tlbiall(struct iommu_domain *domain) ops->tlbi_domain(domain); } static inline int iommu_enable_config_clocks(struct iommu_domain *domain) { struct msm_iommu_ops *ops = to_msm_iommu_ops(domain->ops); if (ops->enable_config_clocks) return ops->enable_config_clocks(domain); return 0; } static inline void iommu_disable_config_clocks(struct iommu_domain *domain) { struct msm_iommu_ops *ops = to_msm_iommu_ops(domain->ops); if (ops->disable_config_clocks) ops->disable_config_clocks(domain); } /** * struct iommu_fwspec - per-device IOMMU instance data * @ops: ops for this device's IOMMU Loading Loading @@ -1086,24 +1060,10 @@ static inline void iommu_device_unlink(struct device *dev, struct device *link) { } static inline void iommu_trigger_fault(struct iommu_domain *domain, unsigned long flags) { } static inline void iommu_tlbiall(struct iommu_domain *domain) { } static inline int iommu_enable_config_clocks(struct iommu_domain *domain) { return 0; } static inline void iommu_disable_config_clocks(struct iommu_domain *domain) { } static inline int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode, const struct iommu_ops *ops) Loading Loading
drivers/iommu/arm-smmu.c +0 −43 Original line number Diff line number Diff line Loading @@ -4037,59 +4037,16 @@ static bool arm_smmu_is_iova_coherent(struct iommu_domain *domain, return ret; } static void arm_smmu_trigger_fault(struct iommu_domain *domain, unsigned long flags) { struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); struct arm_smmu_cfg *cfg = &smmu_domain->cfg; struct arm_smmu_device *smmu; int idx = cfg->cbndx; if (!smmu_domain->smmu) { pr_err("Can't trigger faults on non-attached domains\n"); return; } smmu = smmu_domain->smmu; if (arm_smmu_power_on(smmu->pwr)) return; dev_err(smmu->dev, "Writing 0x%lx to FSRRESTORE on cb %d\n", flags, cfg->cbndx); arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSRRESTORE, flags); /* give the interrupt time to fire... */ msleep(1000); arm_smmu_power_off(smmu, smmu->pwr); } static void arm_smmu_tlbi_domain(struct iommu_domain *domain) { arm_smmu_tlb_inv_context_s1(to_smmu_domain(domain)); } static int arm_smmu_enable_config_clocks(struct iommu_domain *domain) { struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); return arm_smmu_power_on(smmu_domain->smmu->pwr); } static void arm_smmu_disable_config_clocks(struct iommu_domain *domain) { struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); arm_smmu_power_off(smmu_domain->smmu, smmu_domain->smmu->pwr); } static struct msm_iommu_ops arm_smmu_ops = { .map_sg = arm_smmu_map_sg, .iova_to_phys_hard = arm_smmu_iova_to_phys_hard, .is_iova_coherent = arm_smmu_is_iova_coherent, .trigger_fault = arm_smmu_trigger_fault, .tlbi_domain = arm_smmu_tlbi_domain, .enable_config_clocks = arm_smmu_enable_config_clocks, .disable_config_clocks = arm_smmu_disable_config_clocks, .iova_to_pte = arm_smmu_iova_to_pte, .iommu_ops = { Loading
drivers/iommu/iommu-debug.c +1 −119 Original line number Diff line number Diff line Loading @@ -126,8 +126,6 @@ struct iommu_debug_device { u64 phys; size_t len; struct list_head list; struct mutex clk_lock; unsigned int clk_count; /* Protects domain */ struct mutex state_lock; #ifdef CONFIG_ARM64_PTDUMP_CORE Loading Loading @@ -654,10 +652,6 @@ static int iommu_debug_profiling_fast_dma_api_show(struct seq_file *s, } domain = ddev->domain; if (iommu_enable_config_clocks(domain)) { seq_puts(s, "Couldn't enable clocks\n"); goto out_detach; } for (experiment = 0; experiment < 2; ++experiment) { size_t map_avg = 0, unmap_avg = 0; Loading @@ -674,7 +668,7 @@ static int iommu_debug_profiling_fast_dma_api_show(struct seq_file *s, ns = ktime_to_ns(diff); if (dma_mapping_error(dev, dma_addr)) { seq_puts(s, "dma_map_single failed\n"); goto out_disable_config_clocks; goto out_detach; } map_elapsed_ns[i] = ns; Loading Loading @@ -709,8 +703,6 @@ static int iommu_debug_profiling_fast_dma_api_show(struct seq_file *s, seq_printf(s, "] (avg: %zu)\n", unmap_avg); } out_disable_config_clocks: iommu_disable_config_clocks(domain); out_detach: iommu_debug_dma_deconfigure(ddev); out_kfree: Loading Loading @@ -1278,12 +1270,7 @@ static int __apply_to_new_mapping(struct seq_file *s, } dev_err_ratelimited(dev, "testing with pgtables at %pa\n", &pt_phys); if (iommu_enable_config_clocks(domain)) { ds_printf(dev, s, "Couldn't enable clocks\n"); goto out_release_mapping; } ret = fn(dev, s, domain, priv); iommu_disable_config_clocks(domain); out_release_mapping: iommu_debug_dma_deconfigure(ddev); Loading Loading @@ -2013,96 +2000,6 @@ static const struct file_operations iommu_debug_dma_unmap_fops = { .write = iommu_debug_dma_unmap_write, }; static ssize_t iommu_debug_config_clocks_write(struct file *file, const char __user *ubuf, size_t count, loff_t *offset) { char buf; struct iommu_debug_device *ddev = file->private_data; struct device *dev = ddev->dev; /* we're expecting a single character plus (optionally) a newline */ if (count > 2) { dev_err_ratelimited(dev, "Invalid value\n"); return -EINVAL; } if (!ddev->domain) { dev_err_ratelimited(dev, "No domain. Did you already attach?\n"); return -EINVAL; } if (copy_from_user(&buf, ubuf, 1)) { dev_err_ratelimited(dev, "Couldn't copy from user\n"); return -EFAULT; } mutex_lock(&ddev->clk_lock); switch (buf) { case '0': if (ddev->clk_count == 0) { dev_err_ratelimited(dev, "Config clocks already disabled\n"); break; } if (--ddev->clk_count > 0) break; dev_err_ratelimited(dev, "Disabling config clocks\n"); iommu_disable_config_clocks(ddev->domain); break; case '1': if (ddev->clk_count++ > 0) break; dev_err_ratelimited(dev, "Enabling config clocks\n"); if (iommu_enable_config_clocks(ddev->domain)) dev_err_ratelimited(dev, "Failed!\n"); break; default: dev_err_ratelimited(dev, "Invalid value. Should be 0 or 1.\n"); mutex_unlock(&ddev->clk_lock); return -EINVAL; } mutex_unlock(&ddev->clk_lock); return count; } static const struct file_operations iommu_debug_config_clocks_fops = { .open = simple_open, .write = iommu_debug_config_clocks_write, }; static ssize_t iommu_debug_trigger_fault_write( struct file *file, const char __user *ubuf, size_t count, loff_t *offset) { struct iommu_debug_device *ddev = file->private_data; unsigned long flags; if (kstrtoul_from_user(ubuf, count, 0, &flags)) { pr_err_ratelimited("Invalid flags format\n"); return -EFAULT; } mutex_lock(&ddev->state_lock); if (!ddev->domain) { pr_err_ratelimited("No domain. Did you already attach?\n"); mutex_unlock(&ddev->state_lock); return -EINVAL; } iommu_trigger_fault(ddev->domain, flags); mutex_unlock(&ddev->state_lock); return count; } static const struct file_operations iommu_debug_trigger_fault_fops = { .open = simple_open, .write = iommu_debug_trigger_fault_write, }; #ifdef CONFIG_ARM64_PTDUMP_CORE static int ptdump_show(struct seq_file *s, void *v) { Loading Loading @@ -2162,7 +2059,6 @@ static int iommu_debug_device_setup(struct device *dev) if (!ddev) return -ENOMEM; mutex_init(&ddev->clk_lock); mutex_init(&ddev->state_lock); ddev->dev = dev; dir = debugfs_create_dir(dev_name(dev), debugfs_tests_dir); Loading Loading @@ -2298,20 +2194,6 @@ static int iommu_debug_device_setup(struct device *dev) goto err_rmdir; } if (!debugfs_create_file("config_clocks", 0200, dir, ddev, &iommu_debug_config_clocks_fops)) { pr_err_ratelimited("Couldn't create iommu/devices/%s/config_clocks debugfs file\n", dev_name(dev)); goto err_rmdir; } if (!debugfs_create_file("trigger-fault", 0200, dir, ddev, &iommu_debug_trigger_fault_fops)) { pr_err_ratelimited("Couldn't create iommu/devices/%s/trigger-fault debugfs file\n", dev_name(dev)); goto err_rmdir; } #ifdef CONFIG_ARM64_PTDUMP_CORE if (!debugfs_create_file("iommu_page_tables", 0200, dir, ddev, &ptdump_fops)) { Loading
drivers/iommu/iommu.c +0 −17 Original line number Diff line number Diff line Loading @@ -2234,23 +2234,6 @@ void iommu_put_resv_regions(struct device *dev, struct list_head *list) ops->put_resv_regions(dev, list); } /** * iommu_trigger_fault() - trigger an IOMMU fault * @domain: iommu domain * * Triggers a fault on the device to which this domain is attached. * * This function should only be used for debugging purposes, for obvious * reasons. */ void iommu_trigger_fault(struct iommu_domain *domain, unsigned long flags) { struct msm_iommu_ops *ops = to_msm_iommu_ops(domain->ops); if (ops->trigger_fault) ops->trigger_fault(domain, flags); } struct iommu_resv_region *iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot, enum iommu_resv_type type) Loading
include/linux/iommu.h +0 −40 Original line number Diff line number Diff line Loading @@ -390,10 +390,7 @@ struct iommu_ops { * to an iommu domain * @iova_to_phys_hard: translate iova to physical address using IOMMU hardware * @is_iova_coherent: checks coherency of the given iova * @trigger_fault: trigger a fault on the device attached to an iommu domain * @tlbi_domain: Invalidate all TLBs covering an iommu domain * @enable_config_clocks: Enable all config clocks for this domain's IOMMU * @disable_config_clocks: Disable all config clocks for this domain's IOMMU * @iova_to_pte: translate iova to Page Table Entry (PTE). * @iommu_ops: the standard iommu ops */ Loading @@ -404,10 +401,7 @@ struct msm_iommu_ops { dma_addr_t iova, unsigned long trans_flags); bool (*is_iova_coherent)(struct iommu_domain *domain, dma_addr_t iova); void (*trigger_fault)(struct iommu_domain *domain, unsigned long flags); void (*tlbi_domain)(struct iommu_domain *domain); int (*enable_config_clocks)(struct iommu_domain *domain); void (*disable_config_clocks)(struct iommu_domain *domain); uint64_t (*iova_to_pte)(struct iommu_domain *domain, dma_addr_t iova); struct iommu_ops iommu_ops; }; Loading Loading @@ -658,9 +652,6 @@ static inline void iommu_iotlb_gather_add_page(struct iommu_domain *domain, gather->start = start; } extern void iommu_trigger_fault(struct iommu_domain *domain, unsigned long flags); /* PCI device grouping function */ extern struct iommu_group *pci_device_group(struct device *dev); /* Generic device grouping function */ Loading @@ -676,23 +667,6 @@ static inline void iommu_tlbiall(struct iommu_domain *domain) ops->tlbi_domain(domain); } static inline int iommu_enable_config_clocks(struct iommu_domain *domain) { struct msm_iommu_ops *ops = to_msm_iommu_ops(domain->ops); if (ops->enable_config_clocks) return ops->enable_config_clocks(domain); return 0; } static inline void iommu_disable_config_clocks(struct iommu_domain *domain) { struct msm_iommu_ops *ops = to_msm_iommu_ops(domain->ops); if (ops->disable_config_clocks) ops->disable_config_clocks(domain); } /** * struct iommu_fwspec - per-device IOMMU instance data * @ops: ops for this device's IOMMU Loading Loading @@ -1086,24 +1060,10 @@ static inline void iommu_device_unlink(struct device *dev, struct device *link) { } static inline void iommu_trigger_fault(struct iommu_domain *domain, unsigned long flags) { } static inline void iommu_tlbiall(struct iommu_domain *domain) { } static inline int iommu_enable_config_clocks(struct iommu_domain *domain) { return 0; } static inline void iommu_disable_config_clocks(struct iommu_domain *domain) { } static inline int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode, const struct iommu_ops *ops) Loading