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Commit baa93b25 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add spss device node for PIL on SDMSHRIKE"

parents 760fa934 bf71e319

qcom/sa8155-adp-common.dtsi

+23 −0
Original line number Diff line number Diff line
@@ -61,3 +61,26 @@ 
&pil_modem {

	status = "disabled";

};



&soc {

	qcom,lpass@17300000 {

		status = "ok";

		qcom,pil-force-shutdown;

	};



	qcom,turing@8300000 {

		status = "ok";

	};



	qcom,venus@aae0000 {

		status = "ok";

	};



	qcom,spss@1880000 {

		status = "ok";

	};



	qcom,npu@9800000 {

		status = "ok";

	};

};

qcom/sdmshrike.dtsi

+155 −1
Original line number Diff line number Diff line
@@ -503,6 +503,10 @@ 
		compatible = "simple-bus";

	};



	qcom-secure-buffer {

		compatible = "qcom,secure-buffer";

	};



	soc: soc { };

};
@@ -665,6 +669,12 @@ 
		qcom,rtb-size = <0x100000>;

	};



	pil_scm_pas {

		compatible = "qcom,pil-tz-scm-pas";

		interconnects = <&aggre2_noc MASTER_CRYPTO

			&mc_virt SLAVE_EBI1>;

	};



	qcom,mpm2-sleep-counter@c221000 {

		compatible = "qcom,mpm2-sleep-counter";

		reg = <0xc221000 0x1000>;
@@ -1453,7 +1463,6 @@ 
		qcom,dll-hsr-list = <0x0007642c 0x0 0x10 0x2C010800 0x80040868>;



		qcom,devfreq,freq-table = <50000000 200000000>;



		status = "disabled";



		qos0 {
@@ -1467,6 +1476,145 @@ 
		};

	};



	qcom,lpass@17300000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x17300000 0x00100>;



		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;

		qcom,proxy-reg-names = "vdd_cx";



		clocks = <&rpmhcc RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";



		qcom,pas-id = <1>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,smem-id = <423>;

		qcom,sysmon-id = <1>;

		qcom,ssctl-instance-id = <0x14>;

		qcom,firmware-name = "adsp";

		memory-region = <&pil_adsp_mem>;

		qcom,signal-aop;

		qcom,complete-ramdump;

		qcom,pil-force-shutdown;



		/* Inputs from lpass */

		interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,

				<&adsp_smp2p_in 0 0>,

				<&adsp_smp2p_in 2 0>,

				<&adsp_smp2p_in 1 0>,

				<&adsp_smp2p_in 3 0>;



		interrupt-names = "qcom,wdog",

				"qcom,err-fatal",

				"qcom,proxy-unvote",

				"qcom,err-ready",

				"qcom,stop-ack";



		/* Outputs to lpass */

		qcom,smem-states = <&adsp_smp2p_out 0>;

		qcom,smem-state-names = "qcom,force-stop";



		mboxes = <&qmp_aop 0>;

		mbox-names = "adsp-pil";

	};



	qcom,turing@8300000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x8300000 0x100000>;



		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,proxy-reg-names = "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;



		clocks = <&rpmhcc RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";



		qcom,pas-id = <18>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,smem-id = <601>;

		qcom,sysmon-id = <7>;

		qcom,ssctl-instance-id = <0x17>;

		qcom,firmware-name = "cdsp";

		memory-region = <&pil_cdsp_mem>;

		qcom,signal-aop;

		qcom,complete-ramdump;



		qcom,msm-bus,name = "pil-cdsp";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<154 10070 0 0>,

				<154 10070 0 1>;



		/* Inputs from turing */

		interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,

					<&cdsp_smp2p_in 0 0>,

					<&cdsp_smp2p_in 2 0>,

					<&cdsp_smp2p_in 1 0>,

					<&cdsp_smp2p_in 3 0>;



		interrupt-names = "qcom,wdog",

				"qcom,err-fatal",

				"qcom,proxy-unvote",

				"qcom,err-ready",

				"qcom,stop-ack";



		/* Outputs to turing */

		qcom,smem-states = <&cdsp_smp2p_out 0>;

		qcom,smem-state-names = "qcom,force-stop";



		mboxes = <&qmp_aop 0>;

		mbox-names = "cdsp-pil";

	};



	qcom,npu@9800000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x9800000 0x800000>;



		status = "ok";

		qcom,pas-id = <23>;

		qcom,firmware-name = "npu";



		memory-region = <&pil_npu_mem>;

	};



	qcom,spss@1880000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x188101c 0x4>,

			<0x1881024 0x4>,

			<0x1881028 0x4>,

			<0x188103c 0x4>,

			<0x1882014 0x4>;

		reg-names = "sp2soc_irq_status", "sp2soc_irq_clr",

			"sp2soc_irq_mask", "rmb_err", "rmb_err_spare2";

		interrupts = <0 352 1>;



		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,proxy-reg-names = "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;

		vdd_mx-supply = <&VDD_MX_LEVEL>;

		vdd_mx-uV = <RPMH_REGULATOR_LEVEL_TURBO 100000>;



		clocks = <&rpmhcc RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";

		qcom,pil-generic-irq-handler;

		status = "ok";

		qcom,signal-aop;

		qcom,complete-ramdump;



		qcom,pas-id = <14>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,firmware-name = "spss";

		memory-region = <&pil_spss_mem>;

		qcom,spss-scsr-bits = <24 25>;



		mboxes = <&qmp_aop 0>;

		mbox-names = "spss-pil";

	};

};



#include "sdmshrike-pinctrl.dtsi"
@@ -1481,6 +1629,12 @@ 
#include "sa8195-ssc-qupv3.dtsi"

#include "sa8195-usb.dtsi"



&firmware {

	scm {

		compatible = "qcom,scm";

	};

};



&emac_gdsc {

	status = "ok";

};

qcom/sm8150.dtsi

+132 −7
Original line number Diff line number Diff line
@@ -1712,7 +1712,7 @@ 
		qcom,complete-ramdump;



		/* Inputs from mss */

		interrupts-extended = <&pdc 0 266 1>,

		interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,

				<&modem_smp2p_in 0 0>,

				<&modem_smp2p_in 2 0>,

				<&modem_smp2p_in 1 0>,
@@ -1740,7 +1740,9 @@ 


		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;

		qcom,proxy-reg-names = "vdd_cx";

		vdd_mx-supply = <&VDD_MX_LEVEL>;

		qcom,vdd_mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;

		qcom,proxy-reg-names = "vdd_cx","vdd_mx";



		clocks = <&rpmhcc RPMH_CXO_CLK>;

		clock-names = "xo";
@@ -1755,20 +1757,21 @@ 
		memory-region = <&pil_adsp_mem>;

		qcom,signal-aop;

		qcom,complete-ramdump;

		qcom,pil-force-shutdown;



		/* Inputs from lpass */

		interrupts-extended = <&pdc 0 162 1>,

		interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,

				<&adsp_smp2p_in 0 0>,

				<&adsp_smp2p_in 2 0>,

				<&adsp_smp2p_in 1 0>,

				<&adsp_smp2p_in 3 0>;

				<&adsp_smp2p_in 3 0>,

				<&adsp_smp2p_in 7 0>;



		interrupt-names = "qcom,wdog",

				"qcom,err-fatal",

				"qcom,proxy-unvote",

				"qcom,err-ready",

				"qcom,stop-ack";

				"qcom,stop-ack",

				"qcom,shutdown-ack";



		/* Outputs to lpass */

		qcom,smem-states = <&adsp_smp2p_out 0>;
@@ -1806,7 +1809,7 @@ 
		qcom,complete-ramdump;



		/* Inputs from ssc */

		interrupts-extended = <&pdc 0 494 1>,

		interrupts-extended = <&pdc 14 IRQ_TYPE_LEVEL_HIGH>,

				<&dsps_smp2p_in 0 0>,

				<&dsps_smp2p_in 2 0>,

				<&dsps_smp2p_in 1 0>,
@@ -1825,6 +1828,128 @@ 
		mboxes = <&qmp_aop 0>;

		mbox-names = "slpi-pil";

	};



	qcom,spss@1880000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x188101c 0x4>,

		      <0x1881024 0x4>,

		      <0x1881028 0x4>,

		      <0x188103c 0x4>,

		      <0x1882014 0x4>;

		reg-names = "sp2soc_irq_status", "sp2soc_irq_clr",

			    "sp2soc_irq_mask", "rmb_err", "rmb_err_spare2";

		interrupts = <0 352 1>;



		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,proxy-reg-names = "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;

		vdd_mx-supply = <&VDD_MX_LEVEL>;

		vdd_mx-uV = <RPMH_REGULATOR_LEVEL_TURBO 100000>;



		clocks = <&rpmhcc RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";

		qcom,pil-generic-irq-handler;

		status = "ok";

		qcom,signal-aop;

		qcom,complete-ramdump;



		qcom,pas-id = <14>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,firmware-name = "spss";

		memory-region = <&pil_spss_mem>;

		qcom,spss-scsr-bits = <24 25>;



		mboxes = <&qmp_aop 0>;

		mbox-names = "spss-pil";

	};



	qcom,npu@9800000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x9800000 0x800000>;



		status = "ok";

		qcom,pas-id = <23>;

		qcom,firmware-name = "npu";



		memory-region = <&pil_npu_mem>;

	};



	qcom,turing@8300000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0x8300000 0x100000>;



		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,proxy-reg-names = "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;



		clocks = <&rpmhcc RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";



		qcom,pas-id = <18>;

		qcom,proxy-timeout-ms = <10000>;

		qcom,smem-id = <601>;

		qcom,sysmon-id = <7>;

		qcom,ssctl-instance-id = <0x17>;

		qcom,firmware-name = "cdsp";

		memory-region = <&pil_cdsp_mem>;

		qcom,signal-aop;

		qcom,complete-ramdump;



		qcom,msm-bus,name = "pil-cdsp";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<154 10070 0 0>,

			<154 10070 0 1>;



		/* Inputs from turing */

		interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,

				<&cdsp_smp2p_in 0 0>,

				<&cdsp_smp2p_in 2 0>,

				<&cdsp_smp2p_in 1 0>,

				<&cdsp_smp2p_in 3 0>;



		interrupt-names = "qcom,wdog",

				"qcom,err-fatal",

				"qcom,proxy-unvote",

				"qcom,err-ready",

				"qcom,stop-ack";



		/* Outputs to turing */

		qcom,smem-states = <&cdsp_smp2p_out 0>;

		qcom,smem-state-names = "qcom,force-stop";



		mboxes = <&qmp_aop 0>;

		mbox-names = "cdsp-pil";

	};



	qcom,venus@aae0000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0xaae0000 0x4000>;



		vdd-supply = <&mvsc_gdsc>;

		qcom,proxy-reg-names = "vdd";

		qcom,complete-ramdump;



		clocks = <&videocc VIDEO_CC_XO_CLK>,

			<&videocc VIDEO_CC_MVSC_CORE_CLK>,

			<&videocc VIDEO_CC_IRIS_AHB_CLK>;

		clock-names = "xo", "core", "ahb";

		qcom,proxy-clock-names = "xo",  "core", "ahb";



		qcom,core-freq = <200000000>;

		qcom,ahb-freq = <200000000>;



		qcom,pas-id = <9>;

		interconnect-names = "pil-venus";

		interconnects = <&mmss_noc MASTER_VIDEO_P0

				&mc_virt SLAVE_EBI1>;

		qcom,proxy-timeout-ms = <100>;

		qcom,firmware-name = "venus";

		memory-region = <&pil_video_mem>;

	};

};



&firmware {