Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ba78ee00 authored by Boris Brezillon's avatar Boris Brezillon
Browse files

mtd: nand: Add an option to maximize the ECC strength 



The generic NAND DT bindings allows one to tweak the ECC strength and
step size to their need. It can be used to lower the ECC strength to
match a bootloader/firmware config, but might also be used to get a better
reliability.

In the latter case, the user might want to use the maximum ECC strength
without having to explicitly calculate the exact value (this value not
only depends on the OOB size, but also on the NAND controller, and can
be tricky to extract).

Add a generic 'nand-ecc-maximize' DT property and the associated
NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best
ECC strength and step-size on their own.

Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
parent 82830796

Documentation/devicetree/bindings/mtd/nand.txt

+9 −0
Original line number Diff line number Diff line
@@ -35,6 +35,15 @@ Optional NAND chip properties: 
- nand-ecc-step-size: integer representing the number of data bytes

		      that are covered by a single ECC step.



- nand-ecc-maximize: boolean used to specify that you want to maximize ECC

		     strength. The maximum ECC strength is both controller and

		     chip dependent. The controller side has to select the ECC

		     config providing the best strength and taking the OOB area

		     size constraint into account.

		     This is particularly useful when only the in-band area is

		     used by the upper layers, and you want to make your NAND

		     as reliable as possible.



The ECC strength and ECC step size properties define the correction capability

of a controller. Together, they say a controller can correct "{strength} bit

errors per {size} bytes".

drivers/mtd/nand/nand_base.c

+3 −0
Original line number Diff line number Diff line
@@ -4272,6 +4272,9 @@ static int nand_dt_init(struct nand_chip *chip) 
	if (ecc_step > 0)

		chip->ecc.size = ecc_step;



	if (of_property_read_bool(dn, "nand-ecc-maximize"))

		chip->ecc.options |= NAND_ECC_MAXIMIZE;



	return 0;

}

include/linux/mtd/nand.h

+1 −0
Original line number Diff line number Diff line
@@ -141,6 +141,7 @@ enum nand_ecc_algo { 
 * pages and you want to rely on the default implementation.

 */

#define NAND_ECC_GENERIC_ERASED_CHECK	BIT(0)

#define NAND_ECC_MAXIMIZE		BIT(1)



/* Bit mask for flags passed to do_nand_read_ecc */

#define NAND_GET_DEVICE		0x80