Commit ba14ba2d authored Jan 06, 2022 by Dinh Nguyen Committed by Greg Kroah-Hartman Mar 19, 2022

arm64: dts: agilex: use the compatible "intel,socfpga-agilex-hsotg"



[ Upstream commit 268a491aebc25e6dc7c618903b09ac3a2e8af530 ]

The DWC2 USB controller on the Agilex platform does not support clock
gating, so use the chip specific "intel,socfpga-agilex-hsotg"
compatible.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

parent aca8fddd

arch/arm64/boot/dts/intel/socfpga_agilex.dtsi

+2 −2

Original line number	Diff line number	Diff line
		@@ -369,7 +369,7 @@
		};

		usb0: usb@ffb00000 {
		compatible = "snps,dwc2";
		compatible = "intel,socfpga-agilex-hsotg", "snps,dwc2";
		reg = <0xffb00000 0x40000>;
		interrupts = <0 93 4>;
		phys = <&usbphy0>;
		@@ -381,7 +381,7 @@
		};

		usb1: usb@ffb40000 {
		compatible = "snps,dwc2";
		compatible = "intel,socfpga-agilex-hsotg", "snps,dwc2";
		reg = <0xffb40000 0x40000>;
		interrupts = <0 94 4>;
		phys = <&usbphy0>;