Loading msm/sde/sde_hw_util.c +3 −3 Original line number Diff line number Diff line Loading @@ -64,6 +64,7 @@ static u32 sde_hw_util_log_mask = SDE_DBG_MASK_NONE; #define QSEED4_DEFAULT_PRELOAD_V 0x2 #define QSEED4_DEFAULT_PRELOAD_H 0x4 #define GET_REG_BLK_ID(c) (c->log_mask ? (ilog2(c->log_mask) + 1) : 0) typedef void (*scaler_lut_type)(struct sde_hw_blk_reg_map *, struct sde_hw_scaler3_cfg *, u32); Loading @@ -76,10 +77,9 @@ void sde_reg_write(struct sde_hw_blk_reg_map *c, if (c->log_mask & sde_hw_util_log_mask) SDE_DEBUG_DRIVER("[%s:0x%X] <= 0x%X\n", name, c->blk_off + reg_off, val); SDE_EVT32_REGWRITE(c->blk_off, reg_off, val); SDE_EVT32_REGWRITE(c->blk_off + reg_off, val, GET_REG_BLK_ID(c)); writel_relaxed(val, c->base_off + c->blk_off + reg_off); SDE_REG_LOG(c->log_mask ? ilog2(c->log_mask)+1 : 0, val, c->blk_off + reg_off); SDE_REG_LOG(GET_REG_BLK_ID(c), val, c->blk_off + reg_off); } int sde_reg_read(struct sde_hw_blk_reg_map *c, u32 reg_off) Loading msm/sde_io_util.c +2 −1 Original line number Diff line number Diff line Loading @@ -36,7 +36,8 @@ void dss_reg_w(struct dss_io_data *io, u32 offset, u32 value, u32 debug) DEV_DBG("[%08x] => %08x [%08x]\n", (u32)(unsigned long)(io->base + offset), value, in_val); SDE_EVT32_REGWRITE(io->base, offset, value, in_val); SDE_EVT32_REGWRITE(io->base + offset, value, SDE_REG_LOG_RSCC, in_val); } SDE_REG_LOG(SDE_REG_LOG_RSCC, value, offset); } /* dss_reg_w */ Loading Loading
msm/sde/sde_hw_util.c +3 −3 Original line number Diff line number Diff line Loading @@ -64,6 +64,7 @@ static u32 sde_hw_util_log_mask = SDE_DBG_MASK_NONE; #define QSEED4_DEFAULT_PRELOAD_V 0x2 #define QSEED4_DEFAULT_PRELOAD_H 0x4 #define GET_REG_BLK_ID(c) (c->log_mask ? (ilog2(c->log_mask) + 1) : 0) typedef void (*scaler_lut_type)(struct sde_hw_blk_reg_map *, struct sde_hw_scaler3_cfg *, u32); Loading @@ -76,10 +77,9 @@ void sde_reg_write(struct sde_hw_blk_reg_map *c, if (c->log_mask & sde_hw_util_log_mask) SDE_DEBUG_DRIVER("[%s:0x%X] <= 0x%X\n", name, c->blk_off + reg_off, val); SDE_EVT32_REGWRITE(c->blk_off, reg_off, val); SDE_EVT32_REGWRITE(c->blk_off + reg_off, val, GET_REG_BLK_ID(c)); writel_relaxed(val, c->base_off + c->blk_off + reg_off); SDE_REG_LOG(c->log_mask ? ilog2(c->log_mask)+1 : 0, val, c->blk_off + reg_off); SDE_REG_LOG(GET_REG_BLK_ID(c), val, c->blk_off + reg_off); } int sde_reg_read(struct sde_hw_blk_reg_map *c, u32 reg_off) Loading
msm/sde_io_util.c +2 −1 Original line number Diff line number Diff line Loading @@ -36,7 +36,8 @@ void dss_reg_w(struct dss_io_data *io, u32 offset, u32 value, u32 debug) DEV_DBG("[%08x] => %08x [%08x]\n", (u32)(unsigned long)(io->base + offset), value, in_val); SDE_EVT32_REGWRITE(io->base, offset, value, in_val); SDE_EVT32_REGWRITE(io->base + offset, value, SDE_REG_LOG_RSCC, in_val); } SDE_REG_LOG(SDE_REG_LOG_RSCC, value, offset); } /* dss_reg_w */ Loading