Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b990538a authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
Browse files

i7core_edac: CodingSyle fixes/cleanups 



No functional changes.

Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 31983a04

drivers/edac/i7core_edac.c

+23 −27
Original line number Diff line number Diff line
@@ -38,10 +38,6 @@ 
#define I7CORE_REVISION    " Ver: 1.0.0 " __DATE__

#define EDAC_MOD_STR      "i7core_edac"



/* HACK: temporary, just to enable all logs, for now */

#undef debugf0

#define debugf0(fmt, arg...)  edac_printk(KERN_INFO, "i7core", fmt, ##arg)



/*

 * Debug macros

 */
@@ -105,6 +101,7 @@ 
  #define REPEAT_EN		0x01



	/* OFFSETS for Devices 4,5 and 6 Function 1 */



#define MC_DOD_CH_DIMM0		0x48

#define MC_DOD_CH_DIMM1		0x4c

#define MC_DOD_CH_DIMM2		0x50
@@ -227,7 +224,7 @@ struct pci_id_descr pci_devs[] = { 
		/* Memory controller */

	{ PCI_DESCR(3, 0, PCI_DEVICE_ID_INTEL_I7_MCR)     },

	{ PCI_DESCR(3, 1, PCI_DEVICE_ID_INTEL_I7_MC_TAD)  },

	{ PCI_DESCR(3, 2, PCI_DEVICE_ID_INTEL_I7_MC_RAS)  }, /* if RDIMM is supported */

	{ PCI_DESCR(3, 2, PCI_DEVICE_ID_INTEL_I7_MC_RAS)  }, /* if RDIMM */

	{ PCI_DESCR(3, 4, PCI_DEVICE_ID_INTEL_I7_MC_TEST) },



		/* Channel 0 */
@@ -894,7 +891,6 @@ static int write_and_test(struct pci_dev *dev, int where, u32 val) 
	return -EINVAL;

}





/*

 * This routine prepares the Memory Controller for error injection.

 * The error will be injected when some process tries to write to the