Loading arch/arm64/configs/vendor/lahaina_GKI.config +1 −0 Original line number Diff line number Diff line Loading @@ -61,3 +61,4 @@ CONFIG_MSM_HSUSB_PHY=m CONFIG_MSM_CAMCC_LAHAINA=m CONFIG_MSM_BT_POWER=m CONFIG_ARM_SMMU=m CONFIG_MSM_CLK_AOP_QMP=m drivers/clk/qcom/clk-aop-qmp.c +1 −1 Original line number Diff line number Diff line Loading @@ -214,7 +214,7 @@ static const struct clk_ops aop_qmp_clk_ops = { }; DEFINE_CLK_AOP_QMP(qdss_qmp_clk, clock, qdss, QDSS_CLK_LEVEL_DYNAMIC, QDSS_CLK_LEVEL_OFF, CLK_ENABLE_HAND_OFF); QDSS_CLK_LEVEL_OFF, 0); DEFINE_CLK_AOP_QMP(qdss_ao_qmp_clk, clock, qdss_ao, QDSS_CLK_LEVEL_DYNAMIC, QDSS_CLK_LEVEL_OFF, 0); Loading Loading
arch/arm64/configs/vendor/lahaina_GKI.config +1 −0 Original line number Diff line number Diff line Loading @@ -61,3 +61,4 @@ CONFIG_MSM_HSUSB_PHY=m CONFIG_MSM_CAMCC_LAHAINA=m CONFIG_MSM_BT_POWER=m CONFIG_ARM_SMMU=m CONFIG_MSM_CLK_AOP_QMP=m
drivers/clk/qcom/clk-aop-qmp.c +1 −1 Original line number Diff line number Diff line Loading @@ -214,7 +214,7 @@ static const struct clk_ops aop_qmp_clk_ops = { }; DEFINE_CLK_AOP_QMP(qdss_qmp_clk, clock, qdss, QDSS_CLK_LEVEL_DYNAMIC, QDSS_CLK_LEVEL_OFF, CLK_ENABLE_HAND_OFF); QDSS_CLK_LEVEL_OFF, 0); DEFINE_CLK_AOP_QMP(qdss_ao_qmp_clk, clock, qdss_ao, QDSS_CLK_LEVEL_DYNAMIC, QDSS_CLK_LEVEL_OFF, 0); Loading