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Commit b86dcec1 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add reset control support for UFS PHY on Lahaina"

parents e15f441d 9ac2a5d8

qcom/lahaina.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -974,6 +974,9 @@ 
			"ref_aux_clk";

		clocks = <&clock_rpmh RPMH_CXO_CLK>,

			<&clock_gcc GCC_UFS_PHY_PHY_AUX_CLK>;



		resets = <&ufshc_mem 0>;



		status = "disabled";

	};
@@ -983,6 +986,7 @@ 
		interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;

		phys = <&ufsphy_mem>;

		phy-names = "ufsphy";

		#reset-cells = <1>;



		lanes-per-direction = <2>;

		dev-ref-clk-freq = <0>; /* 19.2 MHz */