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Unverified Commit b84f50b0 authored by Daniel Baluta's avatar Daniel Baluta Committed by Mark Brown
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ASoC: fsl_sai: Update Tx/Rx channel enable mask 



Tx channel enable (TCE) / Rx channel enable (RCE) bits
enable corresponding data channel for Tx/Rx operation.

Because SAI supports up the 8 channels TCE/RCE occupy
up the 8 bits inside TCR3/RCR3 registers we need to extend
the mask to reflect this.

Signed-off-by: default avatarDaniel Baluta <daniel.baluta@nxp.com>
Acked-by: default avatarNicolin Chen <nicoleotsuka@gmail.com>
Link: https://lore.kernel.org/r/20190806151214.6783-3-daniel.baluta@nxp.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 5f0ac20e

sound/soc/fsl/fsl_sai.c

+4 −2
Original line number Diff line number Diff line
@@ -599,7 +599,8 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream, 
	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;

	int ret;



	regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE,

	regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx),

			   FSL_SAI_CR3_TRCE_MASK,

			   FSL_SAI_CR3_TRCE);



	ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
@@ -614,7 +615,8 @@ static void fsl_sai_shutdown(struct snd_pcm_substream *substream, 
	struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);

	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;



	regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE, 0);

	regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx),

			   FSL_SAI_CR3_TRCE_MASK, 0);

}



static const struct snd_soc_dai_ops fsl_sai_pcm_dai_ops = {

sound/soc/fsl/fsl_sai.h

+1 −0
Original line number Diff line number Diff line
@@ -110,6 +110,7 @@ 


/* SAI Transmit and Receive Configuration 3 Register */

#define FSL_SAI_CR3_TRCE	BIT(16)

#define FSL_SAI_CR3_TRCE_MASK	GENMASK(23, 16)

#define FSL_SAI_CR3_WDFL(x)	(x)

#define FSL_SAI_CR3_WDFL_MASK	0x1f