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Commit b81e059e authored by Dave Airlie's avatar Dave Airlie
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Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-next 

So here's my promised pile of fixes for 3.9. I've dropped the core prep
patches for vt-switchless suspend/resume as discussed on irc. Highlights:
- Fix dmar on g4x. Not really gfx related, but I'm fed up with getting
  blamed for dmar crapouts.
- Disable wc ptes updates on ilk when dmar is enabled (Chris). So again,
  dmar, but this time gfx related :(
- Reduced range support for hsw, using the pipe CSC (Ville).
- Fixup pll limits for gen3/4 (Patrick Jakobsson). The sdvo patch is
  already confirmed to fix 2 bug reports, so added cc: stable on that one.
- Regression fix for 8bit fb console (Ville).
- Preserve lane reversal bits on DDI/FDI ports (Damien).
- Page flip vs. gpu hang fixes (Ville). Unfortuntely not quite all of
  them, need to decide what to do with the currently still in-flight ones.
- Panel fitter regression fix from Mika Kuoppala (was accidentally left on
  on some pipes with the new modset code since 3.7). This also improves
  the modeset sequence and might help a few other unrelated issues with
  lvds.
- Write backlight regs even harder ... another installement in our eternal
  fight against the BIOS and backlights.
- Fixup lid notifier vs. suspend/resume races (Zhang Rui). Prep work for
  new ACPI stuff, but closing the race itself seems worthwile on its own.
- A few other small fixes and tiny cleanups all over.

Lots of the patches are cc: stable since I've stalled on a few
not-so-important fixes for 3.8 due to the grumpy noise Linus made.

* 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: (33 commits)
  intel/iommu: force writebuffer-flush quirk on Gen 4 Chipsets
  drm/i915: Disable WC PTE updates to w/a buggy IOMMU on ILK
  drm/i915: Implement pipe CSC based limited range RGB output
  drm/i915: inverted brightness quirk for Acer Aspire 4736Z
  drm/i915: Print the hw context status is debugfs
  drm/i915: Use HAS_L3_GPU_CACHE in i915_gem_l3_remap
  drm/i915: Fix PIPE_CONTROL DW/QW write through global GTT on IVB+
  drm/i915: Set i9xx sdvo clock limits according to specifications
  drm/i915: Set i9xx lvds clock limits according to specifications
  drm/i915: Preserve the DDI link reversal configuration
  drm/i915: Preserve the FDI line reversal override bit on CPT
  drm/i915: add missing \n to UTS_RELEASE in the error_state
  drm: Use C8 instead of RGB332 when determining the format from depth/bpp
  drm: Fill depth/bits_per_pixel for C8 format
  drm/i915: don't clflush gem objects in stolen memory
  drm/i915: Don't wait for page flips if there was GPU reset
  drm/i915: Kill obj->pending_flip
  drm/i915: Fix a typo in a intel_modeset_stage_output_state() comment
  drm/i915: remove bogus mutex_unlock from error-path
  drm/i915: Print the pipe control page GTT address
  ...
parents 35f8badc 210561ff

drivers/char/agp/intel-gtt.c

+39 −3
Original line number Diff line number Diff line
@@ -572,6 +572,40 @@ static void intel_gtt_cleanup(void) 
	intel_gtt_teardown_scratch_page();

}



/* Certain Gen5 chipsets require require idling the GPU before

 * unmapping anything from the GTT when VT-d is enabled.

 */

static inline int needs_ilk_vtd_wa(void)

{

#ifdef CONFIG_INTEL_IOMMU

	const unsigned short gpu_devid = intel_private.pcidev->device;



	/* Query intel_iommu to see if we need the workaround. Presumably that

	 * was loaded first.

	 */

	if ((gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB ||

	     gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG) &&

	     intel_iommu_gfx_mapped)

		return 1;

#endif

	return 0;

}



static bool intel_gtt_can_wc(void)

{

	if (INTEL_GTT_GEN <= 2)

		return false;



	if (INTEL_GTT_GEN >= 6)

		return false;



	/* Reports of major corruption with ILK vt'd enabled */

	if (needs_ilk_vtd_wa())

		return false;



	return true;

}



static int intel_gtt_init(void)

{

	u32 gma_addr;
@@ -601,7 +635,7 @@ static int intel_gtt_init(void) 
	gtt_map_size = intel_private.gtt_total_entries * 4;



	intel_private.gtt = NULL;

	if (INTEL_GTT_GEN < 6 && INTEL_GTT_GEN > 2)

	if (intel_gtt_can_wc())

		intel_private.gtt = ioremap_wc(intel_private.gtt_bus_addr,

					       gtt_map_size);

	if (intel_private.gtt == NULL)
@@ -1072,7 +1106,6 @@ static void i965_write_entry(dma_addr_t addr, 
	writel(addr | pte_flags, intel_private.gtt + entry);

}





static int i9xx_setup(void)

{

	u32 reg_addr, gtt_addr;
@@ -1371,10 +1404,13 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, 
}

EXPORT_SYMBOL(intel_gmch_probe);



void intel_gtt_get(size_t *gtt_total, size_t *stolen_size)

void intel_gtt_get(size_t *gtt_total, size_t *stolen_size,

		   phys_addr_t *mappable_base, unsigned long *mappable_end)

{

	*gtt_total = intel_private.gtt_total_entries << PAGE_SHIFT;

	*stolen_size = intel_private.stolen_size;

	*mappable_base = intel_private.gma_bus_addr;

	*mappable_end = intel_private.gtt_mappable_entries << PAGE_SHIFT;

}

EXPORT_SYMBOL(intel_gtt_get);

drivers/gpu/drm/drm_crtc.c

+2 −1
Original line number Diff line number Diff line
@@ -2267,7 +2267,7 @@ uint32_t drm_mode_legacy_fb_format(uint32_t bpp, uint32_t depth) 


	switch (bpp) {

	case 8:

		fmt = DRM_FORMAT_RGB332;

		fmt = DRM_FORMAT_C8;

		break;

	case 16:

		if (depth == 15)
@@ -3870,6 +3870,7 @@ void drm_fb_get_bpp_depth(uint32_t format, unsigned int *depth, 
			  int *bpp)

{

	switch (format) {

	case DRM_FORMAT_C8:

	case DRM_FORMAT_RGB332:

	case DRM_FORMAT_BGR233:

		*depth = 8;

drivers/gpu/drm/i915/i915_debugfs.c

+11 −2
Original line number Diff line number Diff line
@@ -694,7 +694,7 @@ static int i915_error_state(struct seq_file *m, void *unused) 


	seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,

		   error->time.tv_usec);

	seq_printf(m, "Kernel: " UTS_RELEASE);

	seq_printf(m, "Kernel: " UTS_RELEASE "\n");

	seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);

	seq_printf(m, "EIR: 0x%08x\n", error->eir);

	seq_printf(m, "IER: 0x%08x\n", error->ier);
@@ -1484,7 +1484,8 @@ static int i915_context_status(struct seq_file *m, void *unused) 
	struct drm_info_node *node = (struct drm_info_node *) m->private;

	struct drm_device *dev = node->minor->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;

	int ret;

	struct intel_ring_buffer *ring;

	int ret, i;



	ret = mutex_lock_interruptible(&dev->mode_config.mutex);

	if (ret)
@@ -1502,6 +1503,14 @@ static int i915_context_status(struct seq_file *m, void *unused) 
		seq_printf(m, "\n");

	}



	for_each_ring(ring, dev_priv, i) {

		if (ring->default_context) {

			seq_printf(m, "HW default context %s ring ", ring->name);

			describe_obj(m, ring->default_context->obj);

			seq_printf(m, "\n");

		}

	}



	mutex_unlock(&dev->mode_config.mutex);



	return 0;

drivers/gpu/drm/i915/i915_dma.c

+1 −0
Original line number Diff line number Diff line
@@ -1610,6 +1610,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
	mutex_init(&dev_priv->dpio_lock);



	mutex_init(&dev_priv->rps.hw_lock);

	mutex_init(&dev_priv->modeset_restore_lock);



	if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))

		dev_priv->num_pipe = 3;

drivers/gpu/drm/i915/i915_drv.c

+8 −5
Original line number Diff line number Diff line
@@ -470,6 +470,11 @@ static int i915_drm_freeze(struct drm_device *dev) 
{

	struct drm_i915_private *dev_priv = dev->dev_private;



	/* ignore lid events during suspend */

	mutex_lock(&dev_priv->modeset_restore_lock);

	dev_priv->modeset_restore = MODESET_SUSPENDED;

	mutex_unlock(&dev_priv->modeset_restore_lock);



	intel_set_power_well(dev, true);



	drm_kms_helper_poll_disable(dev);
@@ -496,9 +501,6 @@ static int i915_drm_freeze(struct drm_device *dev) 


	intel_opregion_fini(dev);



	/* Modeset on resume, not lid events */

	dev_priv->modeset_on_lid = 0;



	console_lock();

	intel_fbdev_set_suspend(dev, 1);

	console_unlock();
@@ -574,8 +576,6 @@ static int __i915_drm_thaw(struct drm_device *dev) 


	intel_opregion_init(dev);



	dev_priv->modeset_on_lid = 0;



	/*

	 * The console lock can be pretty contented on resume due

	 * to all the printk activity.  Try to keep it out of the hot
@@ -588,6 +588,9 @@ static int __i915_drm_thaw(struct drm_device *dev) 
		schedule_work(&dev_priv->console_resume_work);

	}



	mutex_lock(&dev_priv->modeset_restore_lock);

	dev_priv->modeset_restore = MODESET_DONE;

	mutex_unlock(&dev_priv->modeset_restore_lock);

	return error;

}