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Commit b810641a authored by Abel Vesa's avatar Abel Vesa Committed by Shawn Guo
Browse files

arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores 



The clocks and their latencies will be used by cpufreq-dt.

Signed-off-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent f54f7be5

arch/arm64/boot/dts/freescale/imx8mq.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -87,6 +87,8 @@ 
			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x0>;

			clock-latency = <61036>; /* two CLK32 periods */

			clocks = <&clk IMX8MQ_CLK_ARM>;

			enable-method = "psci";

			next-level-cache = <&A53_L2>;

		};
@@ -95,6 +97,8 @@ 
			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x1>;

			clock-latency = <61036>; /* two CLK32 periods */

			clocks = <&clk IMX8MQ_CLK_ARM>;

			enable-method = "psci";

			next-level-cache = <&A53_L2>;

		};
@@ -103,6 +107,8 @@ 
			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x2>;

			clock-latency = <61036>; /* two CLK32 periods */

			clocks = <&clk IMX8MQ_CLK_ARM>;

			enable-method = "psci";

			next-level-cache = <&A53_L2>;

		};
@@ -111,6 +117,8 @@ 
			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x3>;

			clock-latency = <61036>; /* two CLK32 periods */

			clocks = <&clk IMX8MQ_CLK_ARM>;

			enable-method = "psci";

			next-level-cache = <&A53_L2>;

		};