Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b8020b73 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add support for CPUFREQ-HW for Shima"

parents a590acfe 49843112

qcom/shima-rumi.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -107,3 +107,7 @@ 
	compatible = "qcom,dummycc";

	clock-output-names = "qdss_clocks";

};



&cpufreq_hw {

	clocks = <&bi_tcxo>, <&gcc 0>;

};

qcom/shima.dtsi

+24 −0
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ 
			compatible = "qcom,kryo";

			reg = <0x0 0x0>;

			enable-method = "psci";

			qcom,freq-domain = <&cpufreq_hw 0 4>;

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>;
@@ -57,6 +58,7 @@ 
			compatible = "qcom,kryo";

			reg = <0x0 0x100>;

			enable-method = "psci";

			qcom,freq-domain = <&cpufreq_hw 0 4>;

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>;
@@ -73,6 +75,7 @@ 
			compatible = "qcom,kryo";

			reg = <0x0 0x200>;

			enable-method = "psci";

			qcom,freq-domain = <&cpufreq_hw 0 4>;

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>;
@@ -89,6 +92,7 @@ 
			compatible = "qcom,kryo";

			reg = <0x0 0x300>;

			enable-method = "psci";

			qcom,freq-domain = <&cpufreq_hw 0 4>;

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>;
@@ -105,6 +109,7 @@ 
			compatible = "qcom,kryo";

			reg = <0x0 0x400>;

			enable-method = "psci";

			qcom,freq-domain = <&cpufreq_hw 1 4>;

			capacity-dmips-mhz = <1946>;

			dynamic-power-coefficient = <520>;

			cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
@@ -121,6 +126,7 @@ 
			compatible = "qcom,kryo";

			reg = <0x0 0x500>;

			enable-method = "psci";

			qcom,freq-domain = <&cpufreq_hw 1 4>;

			capacity-dmips-mhz = <1946>;

			dynamic-power-coefficient = <520>;

			cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
@@ -137,6 +143,7 @@ 
			compatible = "qcom,kryo";

			reg = <0x0 0x600>;

			enable-method = "psci";

			qcom,freq-domain = <&cpufreq_hw 1 4>;

			capacity-dmips-mhz = <1946>;

			dynamic-power-coefficient = <520>;

			cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
@@ -153,6 +160,7 @@ 
			compatible = "qcom,kryo";

			reg = <0x0 0x700>;

			enable-method = "psci";

			qcom,freq-domain = <&cpufreq_hw 2 4>;

			capacity-dmips-mhz = <1946>;

			dynamic-power-coefficient = <552>;

			cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
@@ -645,6 +653,22 @@ 
		#reset-cells = <1>;

	};



	cpufreq_hw: qcom,cpufreq-hw {

		compatible = "qcom,cpufreq-hw-epss";

		reg = <0x18591000 0x1000>, <0x18592000 0x1000>,

			<0x18593000 0x1000>;

		reg-names = "freq-domain0", "freq-domain1",

				"freq-domain2";



		clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;

		clock-names = "xo", "alternate";



		qcom,lut-row-size = <4>;

		qcom,skip-enable-check;



		#freq-domain-cells = <2>;

	};



	ipcc_mproc: qcom,ipcc@408000 {

		compatible = "qcom,ipcc";

		reg = <0x408000 0x1000>;